PIC12F629/675
Sheet, and is highly recommended reading for a better
understanding of the device architecture and operation
of the peripheral modules.
1.0
DEVICE OVERVIEW
This document contains device specific information for
the PIC12F629/675. Additional information may be
found in the PIC® Mid-Range Reference Manual
(DS33023), which may be obtained from your local
Microchip Sales Representative or downloaded from
the Microchip web site. The Reference Manual should
be considered a complementary document to this Data
The PIC12F629 and PIC12F675 devices are covered
by this Data Sheet. They are identical, except the
PIC12F675 has a 10-bit A/D converter. They come in
8-pin PDIP, SOIC, MLF-S and DFN packages.
Figure 1-1 shows a block diagram of the PIC12F629/
675 devices. Table 1-1 shows the pinout description.
FIGURE 1-1:
PIC12F629/675 BLOCK DIAGRAM
13
8
Data Bus
Program Counter
Flash
GP0/AN0/CIN+
Program
Memory
GP1/AN1/CIN-/VREF
GP2/AN2/T0CKI/INT/COUT
GP3/MCLR/VPP
GP4/AN3/T1G/OSC2/CLKOUT
GP5/T1CKI/OSC1/CLKIN
RAM
File
Registers
8-Level Stack
(13-bit)
1K x 14
64 x 8
Program
Bus
14
RAM
Addr(1)
9
Addr MUX
Instruction Reg
7
Indirect
Addr
Direct Addr
8
FSR Reg
STATUS Reg
Internal
4 MHz
8
Oscillator
3
MUX
Instruction
Decode &
Control
Power-up
Timer
ALU
Timing
Generation
Oscillator
Start-up Timer
8
OSC1/CLKIN
OSC2/CLKOUT
Power-on
Reset
W Reg
VDD, VSS
Watchdog
Timer
Brown-out
Detect
T1G
T1CKI
Timer0
Timer1
T0CKI
Analog
Comparator
Analog to Digital Converter
EEDATA
and reference
(PIC12F675 only)
128 bytes
DATA
8
EEPROM
EEADDR
CIN- CIN+ COUT
VREF
AN0 AN1 AN2 AN3
Note 1: Higher order bits are from STATUS register.
2010 Microchip Technology Inc.
DS41190G-page 7