PIC12F635/PIC16F636/639
FIGURE 6-1:
TIMER1 BLOCK DIAGRAM
TMR1GE
T1GINV
TMR1ON
Set flag bit
TMR1IF on
Overflow
To C2 Comparator Module
Timer1 Clock
(2)
TMR1
TMR1H
Synchronized
clock input
0
EN
TMR1L
1
Oscillator
(1)
T1SYNC
OSC1/T1CKI
1
(3)
Synchronize
det
Prescaler
1, 2, 4, 8
0
OSC2/T1G
2
T1CKPS<1:0>
TMR1CS
1
0
INTOSC
Without CLKOUT
FOSC
1
0
CxOUT
T1OSCEN
FOSC/4
Internal
Clock
T1GSS
T1ACS
Note 1: ST Buffer is low power type when using LP osc, or high speed type when using T1CKI.
2: Timer1 register increments on rising edge.
3: Synchronize does not operate while in Sleep.
© 2007 Microchip Technology Inc.
DS41232D-page 65