PIC12F635/PIC16F636/639
TABLE 4-1:
SUMMARY OF REGISTERS ASSOCIATED WITH PORTA
Value on
POR, BOR,
WUR
Value on all
other Resets
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PORTA
INTCON
TMR1L
TMR1H
—
—
RA5
T0IE
RA4
RA3
RA2
T0IF
RA1
RA0
--xx xx00
0000 000x
xxxx xxxx
xxxx xxxx
--uu uu00
0000 000x
uuuu uuuu
uuuu uuuu
GIE
PEIE
INTE
RAIE
INTF
RAIF
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
T1CON
T1GINV
—
TMR1GE T1CKPS1 T1CKPS0 T1OSCEN T1SYNC
TMR1CS TMR1ON
0000 0000
---- --10
0000 0000
1111 1111
--11 1111
--11 -111
--00 0000
--11 -111
uuuu uuuu
---- --10
0000 0000
1111 1111
--11 1111
--11 -111
--00 0000
--11 -111
CMCON1
CMCON0
OPTION_REG
TRISA
—
C1OUT
INTEDG
—
—
—
—
CIS
—
CM2
T1GSS
CM1
CxSYNC
CM0
C2OUT
RAPU
—
C2INV
T0CS
TRISA5
C1INV
T0SE
PSA
TRISA3
—
PS2
PS1
PS0
TRISA4
TRISA2
TRISA1
TRISA0
WPUDA
IOCA
—
—
WPUDA5 WPUDA4
WPUDA2 WPUDA1 WPUDA0
—
—
IOCA5
WDA5
IOCA4
WDA4
IOCA3
—
IOCA2
WDA2
IOCA1
WDA1
IOCA0
WDA0
WDA
—
—
Legend:
x= unknown, u= unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by PORTA.
DS41232D-page 56
© 2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
