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PIC12F635-I/SN 参数 Datasheet PDF下载

PIC12F635-I/SN图片预览
型号: PIC12F635-I/SN
PDF下载: 下载PDF文件 查看货源
内容描述: 8月14日引脚,基于闪存的8位CMOS微控制器采用纳瓦技术 [8/14-Pin, Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 234 页 / 3856 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC12F635/PIC16F636/639  
The timer is reset when the:  
11.14.2 INACTIVITY TIMER  
• CS pin is low (any SPI command).  
• Output enable filter is disabled.  
The Inactivity Timer is used to automatically return the  
AFE to Standby mode, if there is no input signal. The  
time-out period is approximately 16 ms (TINACT), based  
on the 32 kHz internal clock.  
• LFDATA pin is enabled (signal passed output  
enable filter).  
The purpose of the Inactivity Timer is to minimize AFE  
current draw by automatically returning the AFE to the  
lower current Standby mode, if there is no input signal  
for approximately 16 ms.  
The timer starts when:  
• Receiving a LF signal.  
The timer causes a low output on the ALERT pin when:  
The timer is reset when:  
• Output enable filter is enabled and modulated  
input signal is present for TALARM, but does not  
pass the output enable filter requirement.  
• An amplitude change in LF input signal, either  
high-to-low or low-to-high  
Note:  
The Alarm timer is disabled if the output  
enable filter is disabled.  
• CS pin is low (any SPI command)  
• Timer-related Soft Reset  
The timer starts when:  
11.14.4 PULSE WIDTH TIMER  
• AFE receives any LF signal  
The timer causes an AFE Soft Reset when:  
The Pulse Width Timer is used to verify that the  
received output enable sequence meets both the  
minimum TOEH and minimum TOEL requirements.  
• A previously received LF signal does not change  
either high-to-low or low-to-high for TINACT  
11.14.5 PERIOD TIMER  
The Soft Reset returns the AFE to Standby mode where  
most of the analog circuits, such as the AGC,  
demodulator and RC oscillator, are powered down. This  
returns the AFE to the lower Standby Current mode.  
The Period Timer is used to verify that the received  
output enable sequence meets the maximum TOET  
requirement.  
11.14.6 AGC SETTLING TIMER (TAGC)  
11.14.3 ALARM TIMER  
This timer is used to keep the output enable filter in  
Reset while the AGC settles on the input signal. The  
time-out period is approximately 3.5 ms. At end of this  
time (TAGC), the input should remain high (TPAGC),  
otherwise the counting is aborted and a Soft Reset is  
issued. See Figure 11-6 for details.  
The Alarm Timer is used to notify the MCU that the AFE  
is receiving LF signal that does not pass the output  
enable filter requirement. The time-out period is  
approximately 32 ms (TALARM) in the presence of  
continuing noise.  
The Alarm Timer time-out occurs if there is an input  
signal for longer than 32 ms that does not meet the  
output enable filter requirements. The Alarm Timer  
time-out causes:  
Note 1: The AFE needs continuous and  
uninterrupted high input signal during  
AGC settling time (TAGC). Any absence of  
signal during this time may reset the timer  
and a new input signal is needed for AGC  
settling time, or may result in improper  
AGC gain settings which will produce  
invalid output.  
a) The ALERT pin to go low.  
b) The ALARM bit to set in the AFE Status  
Configuration 7 register (Register 11-8).  
The MCU is informed of the Alarm timer time-out by  
monitoring the ALERT pin. If the Alarm timer time-out  
occurs, the MCU can take appropriate actions such as  
lowering channel sensitivity or disabling channels. If  
the noise source is ignored, the AFE can return to a  
lower standby current draw state.  
2: The rest of the AFE section wakes up if  
any of these input channels receive the  
AGC  
settling  
time  
correctly.  
<4:2>  
AFE Status Register 7  
bits  
(Register 11-8) indicate which input  
channels have waken up the AFE first.  
Valid input signal on multiple input pins  
can cause more than one channel’s  
indicator bit to be set.  
© 2007 Microchip Technology Inc.  
DS41232D-page 99  
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