PIC12C67X
FIGURE 3-1:
PIC12C67X BLOCK DIAGRAM
Device
PIC12C671
PIC12C672
PIC12CE673
PIC12CE674
Program Memory
1K x 14
2K x 14
1K x 14
2K x 14
Data Memory (RAM)
128 x 8
128 x 8
128 x 8
128 x 8
Non-Volatile Memory (EEPROM)
—
—
16 x 8
16 x 8
13
Program Counter
EPROM
Program
Memory
Data Bus
8
GPIO
GP0/AN0
GP1/AN1/V
REF
GP2/T0CKI/AN2/INT
GP3/MCLR/V
PP
GP4/OSC2/AN3/CLKOUT
GP5/OSC1/CLKIN
SCL
SDA
8 Level Stack
(13 bit)
RAM
128 bytes
File
Registers
RAM Addr
(1)
9
Program
Bus
14
Instruction reg
Direct Addr
7
Addr MUX
8
Indirect
Addr
FSR reg
STATUS reg
16x8
EEPROM
Data
Memory
PIC12CE673
PIC12CE674
8
3
Power-up
Timer
Instruction
Decode &
Control
OSC1/CLKIN
OSC2/CLKOUT
Internal
4 MHz Clock
Timing
Generation
Oscillator
Start-up Timer
Watchdog
Timer
Power-on
Reset
8
MUX
ALU
W reg
MCLR
V
DD
, V
SS
Timer0
A/D
Note 1:
Higher order bits are from the STATUS Register.
DS30561B-page 8
©
1999 Microchip Technology Inc.
MICROCHIP [ MICROCHIP TECHNOLOGY ]
