PIC12F629/675
TABLE 2-1:
Address
SPECIAL FUNCTION REGISTERS SUMMARY
Value on
POR, BOD
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Page
Bank 0
00h
01h
02h
03h
INDF(1)
TMR0
Addressing this Location uses Contents of FSR to Address Data Memory
Timer0 Module’s Register
0000 0000 18,59
xxxx xxxx
0000 0000
0001 1xxx
27
17
11
PCL
Program Counter's (PC) Least Significant Byte
IRP(2)
RP1(2)
RP0
TO
PD
Z
DC
C
STATUS
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
FSR
Indirect Data Memory Address Pointer
xxxx xxxx
--xx xxxx
—
18
19
—
—
—
—
17
13
15
—
30
30
32
—
—
—
—
—
—
—
—
35
—
—
—
—
42
GPIO
—
—
GPIO5
GPIO4
GPIO3
GPIO2
GPIO1
GPIO0
—
Unimplemented
Unimplemented
Unimplemented
Unimplemented
—
—
—
—
—
—
—
PCLATH
—
—
T0IE
—
Write Buffer for Upper 5 bits of Program Counter
---0 0000
0000 0000
00-- 0--0
—
INTCON
PIR1
GIE
PEIE
ADIF
INTE
—
GPIE
CMIF
T0IF
—
INTF
—
GPIF
EEIF
TMR1IF
—
Unimplemented
TMR1L
TMR1H
T1CON
Holding Register for the Least Significant Byte of the 16-bit Timer1
Holding Register for the Most Significant Byte of the 16-bit Timer1
xxxx xxxx
xxxx xxxx
—
TMR1GE T1CKPS1 T1CKPS0 T1OSCEN T1SYNC
TMR1CS TMR1ON -000 0000
—
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
—
—
—
—
—
—
—
—
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
Legend:
—
—
—
—
—
—
—
CMCON
—
—
-0-0 0000
COUT
CINV
CIS
CM2
CM1
CM0
—
Unimplemented
Unimplemented
Unimplemented
Unimplemented
—
—
—
—
—
—
—
ADRESH(3)
ADCON0(3)
Most Significant 8 bits of the Left Shifted A/D Result or 2 bits of the Right Shifted Result
ADFM VCFG CHS1 CHS0 GO/DONE
xxxx xxxx
—
—
ADON
00-- 0000 43,59
— = unimplemented locations read as ‘0’, u= unchanged, x= unknown, q= value depends on condition,
shaded = unimplemented
Note 1: This is not a physical register.
2: These bits are reserved and should always be maintained as ‘0’.
3: PIC12F675 only.
2003 Microchip Technology Inc.
DS41190C-page 9