PIC12F629/675
be applied to an input of the comparator. In addition,
GP2 can be configured as the comparator output.
The Comparator Control Register (CMCON), shown
in Register 6-±, contains the bits to control the
comparator.
6.0
COMPARATOR MODULE
The PIC±2F629/675 devices have one analog
comparator. The inputs to the comparator are
multiplexed with the GP0 and GP± pins. There is an
on-chip Comparator Voltage Reference that can also
REGISTER 6-1:
CMCON — COMPARATOR CONTROL REGISTER (ADDRESS: 19h)
U-0
—
R-0
U-0
—
R/W-0
CINV
R/W-0
CIS
R/W-0
CM2
R/W-0
CM±
R/W-0
CM0
COUT
bit 7
bit 0
bit 7
bit 6
Unimplemented: Read as ‘0’
COUT: Comparator Output bit
When CINV = 0:
1= VIN+ > VIN-
0= VIN+ < VIN-
When CINV = ±:
1= VIN+ < VIN-
0= VIN+ > VIN-
bit 5
bit 4
Unimplemented: Read as ‘0’
CINV: Comparator Output Inversion bit
1= Output inverted
0= Output not inverted
bit 3
CIS: Comparator Input Switch bit
When CM2:CM0 = 110or 101:
1= VIN- connects to CIN+
0= VIN- connects to CIN-
bit 2-0
CM2:CM0: Comparator Mode bits
Figure 6-2 shows the Comparator modes and CM2:CM0 bit settings
Legend:
R = Readable bit
W = Writable bit
’±’ = Bit is set
U = Unimplemented bit, read as ‘0’
- n = Value at POR
’0’ = Bit is cleared
x = Bit is unknown
2003 Microchip Technology Inc.
DS41190C-page 35