PIC12F629/675
12.0 ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings†
Ambient temperature under bias........................................................................................................... -40 to +±25°C
Storage temperature ........................................................................................................................ -65°C to +±50°C
Voltage on VDD with respect to VSS ..................................................................................................... -0.3 to +6.5V
Voltage on MCLR with respect to Vss ..................................................................................................-0.3 to +±3.5V
Voltage on all other pins with respect to VSS ........................................................................... -0.3V to (VDD + 0.3V)
(1)
Total power dissipation ...............................................................................................................................800 mW
Maximum current out of VSS pin ..................................................................................................................... 300 mA
Maximum current into VDD pin ........................................................................................................................ 250 mA
Input clamp current, IIK (VI < 0 or VI > VDD)............................................................................................................... 20 mA
Output clamp current, IOK (Vo < 0 or Vo >VDD)......................................................................................................... 20 mA
Maximum output current sunk by any I/O pin.................................................................................................... 25 mA
Maximum output current sourced by any I/O pin .............................................................................................. 25 mA
Maximum current sunk by all GPIO ................................................................................................................ ±25 mA
Maximum current sourced all GPIO................................................................................................................ ±25 mA
Note 1: Power dissipation is calculated as follows: PDIS = VDD x {IDD - ∑ IOH} + ∑ {(VDD-VOH) x IOH} + ∑(VOl x IOL).
† NOTICE: Stresses above those listed under ‘Absolute Maximum Ratings’ may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions above those
indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for
extended periods may affect device reliability.
Note: Voltage spikes below VSS at the MCLR pin, inducing currents greater than 80 mA, may cause latchup. Thus,
a series resistor of 50-±00 Ω should be used when applying a "low" level to the MCLR pin, rather than pulling
this pin directly to VSS.
2003 Microchip Technology Inc.
DS41190C-page 83
MICROCHIP [ MICROCHIP ]
