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PIC12C508A-04/P 参数 Datasheet PDF下载

PIC12C508A-04/P图片预览
型号: PIC12C508A-04/P
PDF下载: 下载PDF文件 查看货源
内容描述: 8引脚, 8位CMOS微控制器 [8-Pin, 8-Bit CMOS Microcontrollers]
分类和应用: 微控制器和处理器外围集成电路光电二极管PC可编程只读存储器时钟
文件页数/大小: 113 页 / 1604 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC12C5XX  
TABLE 11-4: TIMING REQUIREMENTS - PIC12C508/C509  
AC Characteristics  
Standard Operating Conditions (unless otherwise specified)  
Operating Temperature  
0°C TA +70°C (commercial)  
–40°C TA +85°C (industrial)  
–40°C TA +125°C (extended)  
Operating Voltage VDD range is described in Section 11.1  
Parameter  
(1)  
No.  
Sym  
TosH2ioV  
TosH2ioI  
Characteristic  
Min  
Typ  
Max  
100*  
Units  
ns  
(3)  
17  
OSC1(Q1 cycle) to Port out valid  
OSC1(Q2 cycle) to Port input invalid  
TBD  
ns  
18  
(I/O in hold time)  
TioV2osH  
Port input valid to OSC1↑  
TBD  
ns  
19  
(I/O in setup time)  
(2, 3)  
TioR  
TioF  
10  
10  
25**  
25**  
ns  
ns  
20  
21  
Port output rise time  
(2, 3)  
Port output fall time  
*
These parameters are characterized but not tested.  
** These parameters are design targets and are not tested. No characterization data available at this time.  
Note 1: Data in the Typical (“Typ”) column is at 5V, 25°C unless otherwise stated. These parameters are for design  
guidance only and are not tested.  
2: Measurements are taken in EXTRC mode.  
3: See Figure 11-1 for loading conditions.  
FIGURE 11-4: RESET, WATCHDOG TIMER, AND DEVICE RESET TIMER TIMING - PIC12C508/C509  
VDD  
MCLR  
30  
Internal  
POR  
32  
32  
32  
DRT  
Timeout  
(Note 2)  
Internal  
RESET  
Watchdog  
Timer  
RESET  
31  
34  
34  
I/O pin  
(Note 1)  
Note 1: I/O pins must be taken out of hi-impedance mode by enabling the output drivers in software.  
2: Runs in MCLR or WDT reset only in XT and LP modes.  
DS40139E-page 72  
1999 Microchip Technology Inc.  
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