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PIC12C508A-04/P 参数 Datasheet PDF下载

PIC12C508A-04/P图片预览
型号: PIC12C508A-04/P
PDF下载: 下载PDF文件 查看货源
内容描述: 8引脚, 8位CMOS微控制器 [8-Pin, 8-Bit CMOS Microcontrollers]
分类和应用: 微控制器和处理器外围集成电路光电二极管PC可编程只读存储器时钟
文件页数/大小: 113 页 / 1604 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC12C5XX  
TABLE 9-2:  
INSTRUCTION SET SUMMARY  
12-Bit Opcode  
Mnemonic,  
Operands  
Status  
Description  
Cycles MSb  
LSb Affected Notes  
1
1
1
1
1
1
0001 11df ffff  
C,DC,Z 1,2,4  
Add W and f  
AND W with f  
Clear f  
Clear W  
Complement f  
Decrement f  
Decrement f, Skip if 0  
Increment f  
Increment f, Skip if 0  
Inclusive OR W with f  
Move f  
Move W to f  
No Operation  
Rotate left f through Carry  
Rotate right f through Carry  
Subtract W from f  
Swap f  
ADDWF  
ANDWF  
CLRF  
CLRW  
COMF  
DECF  
DECFSZ  
INCF  
INCFSZ  
IORWF  
MOVF  
MOVWF  
NOP  
f,d  
f,d  
f
0001 01df ffff  
0000 011f ffff  
0000 0100 0000  
0010 01df ffff  
0000 11df ffff  
Z
Z
Z
2,4  
4
Z
f, d  
f, d  
f, d  
f, d  
f, d  
f, d  
f, d  
f
Z
None  
Z
None  
Z
Z
None  
None  
C
2,4  
2,4  
2,4  
2,4  
2,4  
2,4  
1,4  
1(2) 0010 11df ffff  
0010 10df ffff  
1(2) 0011 11df ffff  
1
1
1
1
1
1
1
1
1
1
0001 00df ffff  
0010 00df ffff  
0000 001f ffff  
0000 0000 0000  
0011 01df ffff  
0011 00df ffff  
0000 10df ffff  
0011 10df ffff  
0001 10df ffff  
2,4  
2,4  
RLF  
RRF  
SUBWF  
SWAPF  
XORWF  
f, d  
f, d  
f, d  
f, d  
f, d  
C
C,DC,Z 1,2,4  
None  
Z
2,4  
2,4  
Exclusive OR W with f  
BIT-ORIENTED FILE REGISTER OPERATIONS  
1
1
0100 bbbf ffff  
0101 bbbf ffff  
None  
None  
None  
None  
2,4  
2,4  
Bit Clear f  
Bit Set f  
Bit Test f, Skip if Clear  
Bit Test f, Skip if Set  
BCF  
BSF  
BTFSC  
BTFSS  
f, b  
f, b  
f, b  
f, b  
1 (2) 0110 bbbf ffff  
1 (2) 0111 bbbf ffff  
LITERAL AND CONTROL OPERATIONS  
1
2
1
2
1
1
1
2
1
1
1
1110 kkkk kkkk  
1001 kkkk kkkk  
0000 0000 0100  
101k kkkk kkkk  
1101 kkkk kkkk  
1100 kkkk kkkk  
0000 0000 0010  
1000 kkkk kkkk  
0000 0000 0011  
0000 0000 0fff  
1111 kkkk kkkk  
Z
AND literal with W  
Call subroutine  
ANDLW  
CALL  
CLRWDT  
GOTO  
IORLW  
MOVLW  
OPTION  
RETLW  
SLEEP  
TRIS  
k
k
k
k
k
k
k
f
None  
TO, PD  
None  
Z
None  
None  
None  
TO, PD  
None  
Z
1
3
Clear Watchdog Timer  
Unconditional branch  
Inclusive OR Literal with W  
Move Literal to W  
Load OPTION register  
Return, place Literal in W  
Go into standby mode  
Load TRIS register  
Exclusive OR Literal to W  
XORLW  
k
Note 1: The 9th bit of the program counter will be forced to a ’0’ by any instruction that writes to the PC except for GOTO.  
(Section 4.6)  
2: When an I/O register is modified as a function of itself (e.g. MOVF GPIO, 1), the value used will be that value  
present on the pins themselves. For example, if the data latch is ’1’ for a pin configured as input and is driven  
low by an external device, the data will be written back with a ’0’.  
3: The instruction TRIS f, where f = 6 causes the contents of the W register to be written to the tristate latches of  
GPIO. A ’1’ forces the pin to a hi-impedance state and disables the output buffers.  
4: If this instruction is executed on the TMR0 register (and, where applicable, d = 1), the prescaler will be cleared  
(if assigned to TMR0).  
DS40139E-page 48  
1999 Microchip Technology Inc.  
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