PIC12F629/675
10.2 Instruction Descriptions
ADDLW
Add Literal and W
BCF
Bit Clear f
Syntax:
[label] ADDLW
0 k 255
k
Syntax:
[label] BCF f,b
Operands:
Operation:
Status Affected:
Description:
Operands:
0 f 127
0 b 7
(W) + k (W)
C, DC, Z
Operation:
0 (f<b>)
Status Affected:
Description:
None
The contents of the W register
are added to the eight-bit literal ‘k’
and the result is placed in the W
register.
Bit ‘b’ in register ‘f’ is cleared.
BSF
Bit Set f
ADDWF
Add W and f
Syntax:
[label] BSF f,b
Syntax:
[label] ADDWF f,d
Operands:
0 f 127
0 b 7
Operands:
0 f 127
d
Operation:
1 (f<b>)
Operation:
(W) + (f) (destination)
Status Affected:
Description:
None
Status Affected: C, DC, Z
Bit ‘b’ in register ‘f’ is set.
Description:
Add the contents of the W register
with register ‘f’. If ‘d’ is 0, the
result is stored in the W register. If
‘d’ is 1, the result is stored back in
register ‘f’.
BTFSS
Bit Test f, Skip if Set
ANDLW
AND Literal with W
Syntax:
[label] BTFSS f,b
Syntax:
[label] ANDLW
0 k 255
k
Operands:
0 f 127
0 b < 7
Operands:
Operation:
Status Affected:
Description:
(W) .AND. (k) (W)
Operation:
skip if (f<b>) = 1
Z
Status Affected: None
The contents of W register are
AND’ed with the eight-bit literal
‘k’. The result is placed in the W
register.
Description: If bit ‘b’ in register ‘f’ is ‘0’, the next
instruction is executed.
If bit ‘b’ is ‘1’, then the next
instruction is discarded and a NOP
is executed instead, making this a
2TCY instruction.
ANDWF
AND W with f
Syntax:
[label] ANDWF f,d
Operands:
0 f 127
d
Operation:
(W) .AND. (f) (destination)
Status Affected:
Description:
Z
AND the W register with register
‘f’. If ‘d’ is 0, the result is stored in
the W register. If ‘d’ is 1, the result
is stored back in register ‘f’.
2010 Microchip Technology Inc.
DS41190G-page 73
MICROCHIP [ MICROCHIP ]
