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PIC12F629-I/SNVAO 参数 Datasheet PDF下载

PIC12F629-I/SNVAO图片预览
型号: PIC12F629-I/SNVAO
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microcontroller, 8-Bit, FLASH, 20MHz, CMOS, PDSO8]
分类和应用: 闪存微控制器
文件页数/大小: 136 页 / 1422 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC12F629/675  
range by more than 0.6V in either direction, one of the  
diodes is forward biased and a latch-up may occur. A  
6.3  
Analog Input Connection  
Considerations  
maximum  
source  
impedance  
of  
10 k  
is  
A simplified circuit for an analog input is shown in  
Figure 6-3. Since the analog pins are connected to a  
digital output, they have reverse biased diodes to VDD  
and VSS. The analog input, therefore, must be between  
VSS and VDD. If the input voltage deviates from this  
recommended for the analog sources. Any external  
component connected to an analog input pin, such as  
a capacitor or a Zener diode, should have very little  
leakage current.  
FIGURE 6-3:  
ANALOG INPUT MODE  
VDD  
VT = 0.6V  
RIC  
Rs < 10K  
AIN  
Leakage  
±500 nA  
CPIN  
5 pF  
VA  
VT = 0.6V  
Vss  
Legend:  
CPIN  
VT  
= Input Capacitance  
= Threshold Voltage  
ILEAKAGE  
RIC  
= Leakage Current at the pin due to Various Junctions  
= Interconnect Resistance  
RS  
= Source Impedance  
VA  
= Analog Voltage  
The TRISIO<2> bit functions as an output enable/  
disable for the GP2 pin while the comparator is in an  
Output mode.  
6.4  
Comparator Output  
The comparator output, COUT, is read through the  
CMCON register. This bit is read-only. The comparator  
output may also be directly output to the GP2 pin in  
three of the eight possible modes, as shown in  
Figure 6-2. When in one of these modes, the output on  
GP2 is asynchronous to the internal clock. Figure 6-4  
shows the comparator output block diagram.  
Note 1: When reading the GPIO register, all pins  
configured as analog inputs will read as a  
0’. Pins configured as digital inputs will  
convert an analog input according to the  
TTL input specification.  
2: Analog levels on any pin that is defined as  
a digital input, may cause the input buffer  
to consume more current than is  
specified.  
FIGURE 6-4:  
MODIFIED COMPARATOR OUTPUT BLOCK DIAGRAM  
GP0/CIN+  
GP1/CIN-  
CVREF  
To GP2/T0CKI pin  
To Data Bus  
RD CMCON  
Q
Q
D
EN  
CINV  
CM2:CM0  
Set CMIF bit  
D
RD CMCON  
EN  
Reset  
DS41190G-page 40  
2010 Microchip Technology Inc.