PIC12F629/675
TABLE 9-7:
Register
INITIALIZATION CONDITION FOR REGISTERS
• MCLR Reset during
• Wake-up from Sleep
through interrupt
• Wake-up from Sleep
through WDT Time-out
normal operation
Power-on
Reset
Address
• MCLR Reset during Sleep
• WDT Reset
• Brown-out Detect(1)
W
—
00h/80h
01h
xxxx xxxx
—
uuuu uuuu
—
uuuu uuuu
—
INDF
TMR0
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
--xx xxxx
---0 0000
0000 0000
00-- 0--0
-000 0000
-0-0 0000
xxxx xxxx
00-- 0000
1111 1111
--11 1111
00-- 0--0
---- --0x
1000 00--
--11 -111
--00 0000
0-0- 0000
0000 0000
-000 0000
---- x000
---- ----
xxxx xxxx
-000 1111
uuuu uuuu
0000 0000
000q quuu(4)
uuuu uuuu
--uu uuuu
---0 0000
0000 000u
00-- 0--0
-uuu uuuu
-0-0 0000
uuuu uuuu
00-- 0000
1111 1111
--11 1111
00-- 0--0
---- --uu(1,6)
1000 00--
--11 -111
--00 0000
0-0- 0000
0000 0000
-000 0000
---- q000
---- ----
uuuu uuuu
-000 1111
uuuu uuuu
PC + 1(3)
PCL
02h/82h
03h/83h
04h/84h
05h
STATUS
FSR
uuuq quuu(4)
uuuu uuuu
--uu uuuu
---u uuuu
uuuu uuqq(2)
qq-- q--q(2,5)
-uuu uuuu
-u-u uuuu
uuuu uuuu
uu-- uuuu
uuuu uuuu
--uu uuuu
uu-- u--u
---- --uu
uuuu uu--
uuuu uuuu
--uu uuuu
u-u- uuuu
uuuu uuuu
-uuu uuuu
---- uuuu
---- ----
uuuu uuuu
-uuu uuuu
GPIO
PCLATH
INTCON
PIR1
0Ah/8Ah
0Bh/8Bh
0Ch
T1CON
CMCON
ADRESH
ADCON0
OPTION_REG
TRISIO
PIE1
10h
19h
1Eh
1Fh
81h
85h
8Ch
PCON
8Eh
OSCCAL
WPU
90h
95h
IOC
96h
VRCON
EEDATA
EEADR
EECON1
EECON2
ADRESL
ANSEL
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
Legend:u= unchanged, x= unknown, -= unimplemented bit, reads as ‘0’, q= value depends on condition.
Note 1: If VDD goes too low, Power-on Reset will be activated and registers will be affected differently.
2: One or more bits in INTCON and/or PIR1 will be affected (to cause wake-up).
3: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt
vector (0004h).
4: See Table 9-6 for Reset value for specific condition.
5: If wake-up was due to data EEPROM write completing, Bit 7 = 1; A/D conversion completing, Bit 6 = 1;
Comparator input changing, bit 3 = 1; or Timer1 rolling over, bit 0 = 1. All other interrupts generating a
wake-up will cause these bits to = u.
6: If Reset was due to brown-out, then bit 0 = 0. All other Resets will cause bit 0 = u.
2010 Microchip Technology Inc.
DS41190G-page 61