PIC12F629/675
SUBLW
Subtract W from Literal
RLF
Rotate Left f through Carry
Syntax:
[ label ] SUBLW k
0 k 255
Syntax:
[ label ] RLF f,d
Operands:
Operation:
Operands:
0 f 127
d [0,1]
k - (W) W)
Status Affected: C, DC, Z
Operation:
See description below
C
Description:
The W register is subtracted (2’s
Status Affected:
Description:
complement method) from the
eight-bit literal ‘k’. The result is
placed in the W register.
The contents of register ‘f’ are rotated
one bit to the left through the Carry
Flag. If ‘d’ is 0, the result is placed in
the W register. If ‘d’ is 1, the result is
stored back in register ‘f’.
C
Register f
SUBWF
Subtract W from f
Syntax:
[ label ] SUBWF f,d
Operands:
0 f 127
d [0,1]
RRF
Rotate Right f through Carry
Syntax:
[ label ] RRF f,d
Operation:
(f) - (W) destination)
Operands:
0 f 127
d [0,1]
Status
Affected:
C, DC, Z
Operation:
See description below
C
Description:
Subtract (2’s complement method)
W register from register ‘f’. If ‘d’ is
0, the result is stored in the W
register. If ‘d’ is 1, the result is
stored back in register ‘f’.
Status Affected:
Description:
The contents of register ‘f’ are
rotated one bit to the right through
the Carry Flag. If ‘d’ is 0, the result
is placed in the W register. If ‘d’ is
1, the result is placed back in
register ‘f’.
SWAPF
Swap Nibbles in f
C
Register f
Syntax:
[ label ] SWAPF f,d
Operands:
0 f 127
d [0,1]
Operation:
(f<3:0>) (destination<7:4>),
(f<7:4>) (destination<3:0>)
SLEEP
Syntax:
[ label ] SLEEP
None
Status Affected: None
Operands:
Operation:
Description: The upper and lower nibbles of
00h WDT,
0 WDT prescaler,
1 TO,
register ‘f’ are exchanged. If ‘d’ is
0, the result is placed in the W
register. If ‘d’ is 1, the result is
placed in register ‘f’.
0 PD
Status Affected:
Description:
TO, PD
The power-down Status bit, PD is
cleared. Time-out Status bit, TO
is set. Watchdog Timer and its
prescaler are cleared.
The processor is put into Sleep
mode with the oscillator stopped.
DS41190G-page 78
2010 Microchip Technology Inc.