PIC12F629/675
9.1
Configuration Bits
Note:
Address 2007h is beyond the user program
memory space. It belongs to the special con-
figuration memory space (2000h-3FFFh),
which can be accessed only during program-
ming. See PIC12F629/675 Programming
Specification for more information.
The Configuration bits can be programmed (read as
‘0’), or left unprogrammed (read as ‘1’) to select various
device configurations, as shown in Register 9.2. These
bits are mapped in program memory location 2007h.
REGISTER 9-1:
CONFIG: CONFIGURATION WORD (ADDRESS: 2007h)
R/P-1 R/P-1
U-0
U-0
U-0
R/P-1
R/P-1
R/P-1
R/P-1
R/P-1
R/P-1
R/P-1
R/P-1
R/P-1
BG1
BG0
—
—
—
CPD
CP
BODEN MCLRE PWRTE WDTE F0SC2 F0SC1 F0SC0
bit 0
bit 13
Legend:
P = Programmed using ICSP™
R = Readable bit
Writable bit
1 = bit is set
U = Unimplemented bit, read as ‘0’
-n = Value at POR
0 = bit is cleared
x = bit is unknown
(1)
bit 13-12
BG1:BG0: Bandgap Calibration bits for BOD and POR voltage
00= Lowest bandgap voltage
11= Highest bandgap voltage
bit 11-9
bit 8
Unimplemented: Read as ‘0’
(2)
CPD: Data Code Protection bit
1= Data memory code protection is disabled
0= Data memory code protection is enabled
(3)
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
CP: Code Protection bit
1= Program Memory code protection is disabled
0= Program Memory code protection is enabled
(4)
BODEN: Brown-out Detect Enable bit
1= BOD enabled
0= BOD disabled
(5)
MCLRE: GP3/MCLR Pin Function Select bit
1= GP3/MCLR pin function is MCLR
0= GP3/MCLR pin function is digital I/O, MCLR internally tied to VDD
PWRTE: Power-up Timer Enable bit
1= PWRT disabled
0= PWRT enabled
WDTE: Watchdog Timer Enable bit
1= WDT enabled
0= WDT disabled
FOSC2:FOSC0: Oscillator Selection bits
111= RC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN
110= RC oscillator: I/O function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN
101= INTOSC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN
100= INTOSC oscillator: I/O function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN
011= EC: I/O function on GP4/OSC2/CLKOUT pin, CLKIN on GP5/OSC1/CLKIN
010= HS oscillator: High speed crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN
001= XT oscillator: Crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN
000= LP oscillator: Low-power crystal on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN
Note 1: The Bandgap Calibration bits are factory programmed and must be read and saved prior to erasing the device as spec-
ified in the PIC12F629/675 Programming Specification. These bits are reflected in an export of the Configuration Word.
Microchip Development Tools maintain all Calibration bits to factory settings.
2: The entire data EEPROM will be erased when the code protection is turned off.
3: The entire program memory will be erased, including OSCCAL value, when the code protection is turned off.
4: Enabling Brown-out Detect does not automatically enable Power-up Timer.
5: When MCLR is asserted in INTOSC or RC mode, the internal clock oscillator is disabled.
DS41190G-page 54
2010 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
