PIC10F200/202/204/206
4.3.2
SPECIAL FUNCTION REGISTERS
The Special Function Registers (SFRs) are registers
used by the CPU and peripheral functions to control the
operation of the device (Table 4-1).
The Special Function Registers can be classified into
two sets. The Special Function Registers associated
with the “core” functions are described in this section.
Those related to the operation of the peripheral
features are described in the section for each
peripheral feature.
TABLE 4-1:
SPECIAL FUNCTION REGISTER (SFR) SUMMARY (PIC10F200/202/204/206)
Value on
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Power-On Page #
Reset
(2)
00h
01h
INDF
Uses Contents of FSR to Address Data Memory (not a physical register)
8-bit Real-Time Clock/Counter
xxxx xxxx
23
TMR0
PCL
xxxx xxxx 29, 33
(1)
02h
Low-order 8 bits of PC
1111 1111
22
19
23
21
25
34
37
20
(5)
(3)
03h
04h
05h
06h
STATUS
FSR
GPWUF CWUF
—
TO
PD
Z
DC
C
00-1 1xxx
111x xxxx
Indirect Data Memory Address Pointer
OSCCAL
GPIO
CAL6
—
CAL5
—
CAL4
—
CAL3
—
CAL2
GP3
CAL1
GP2
CAL0 FOSC4 1111 1110
GP1 GP0 ---- xxxx
(4)
07h
CMCON0 CMPOUT COUTEN
POL
—
CMPT0CS CMPON CNREF CPREF CWU 1111 1111
N/A
TRISGPIO
OPTION
—
—
—
I/O Control Register
PSA PS2
---- 1111
1111 1111
N/A
GPWU
GPPU
T0CS
T0SE
PS1
PS0
Legend:
– = unimplemented, read as ‘0’, x= unknown, u= unchanged, q= value depends on condition.
Note 1: The upper byte of the Program Counter is not directly accessible. See Section 4.7 “Program Counter” for an
explanation of how to access these bits.
2: Other (non Power-up) Resets include external Reset through MCLR, Watchdog Timer and wake-up on pin change
Reset.
3: See Table 9-1 for other Reset specific values.
4: PIC10F204/206 only.
5: PIC10F204/206 only. On all other devices, this bit is reserved and should not be used.
DS41239D-page 18
© 2007 Microchip Technology Inc.
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