PIC10F200/202/204/206
12.3
DC Characteristics: PIC10F200/202/204/206 (Industrial, Extended)
Standard Operating Conditions (unless otherwise specified)
Operating temperature
-40°C
≤
T
A
≤
+85°C (industrial)
-40°C
≤
T
A
≤
+125°C (extended)
Operating voltage V
DD
range as described in DC specification
Min
Typ†
Max
Units
Conditions
DC CHARACTERISTICS
Param
No.
Sym
V
IL
Characteristic
Input Low Voltage
I/O ports:
with TTL buffer
with Schmitt Trigger
buffer
MCLR, T0CKI
D030
D030A
D031
D032
V
IH
D040
D040A
D041
D042
D070
D060
D061
D080
D080A
I
PUR
I
IL
Vss
Vss
Vss
Vss
—
—
—
—
—
0.8
0.15 V
DD
0.2 V
DD
0.2 V
DD
V
V
V
V
For all 4.5
≤
V
DD
≤
5.5V
Otherwise
Input High Voltage
I/O ports:
with TTL buffer
with Schmitt Trigger
buffer
MCLR, T0CKI
GPIO weak pull-up
I/O ports
GP3/MCLR
(4)
Output Low Voltage
I/O ports
—
—
Output High Voltage
—
—
0.6
0.6
V
V
I
OL
= 8.5 mA, V
DD
= 4.5V, -40°C to
+85°C
I
OL
= 7.0 mA, V
DD
= 4.5V, -40°C to
+125°C
I
OH
= -3.0 mA, V
DD
= 4.5V, -40°C to
+85°C
I
OH
= -2.5 mA, V
DD
= 4.5V, -40°C to
+125°C
current
(3)
(1, 2)
2.0
0.25 V
DD
+ 0.8
0.8V
DD
0.8V
DD
50
—
—
—
—
—
—
250
±0.1
±0.7
V
DD
V
DD
V
DD
V
DD
400
±1
±5
V
V
V
V
μA
μA
μA
4.5
≤
V
DD
≤
5.5V
Otherwise
For entire V
DD
range
V
DD
= 5V, V
PIN
= V
SS
Vss
≤
V
PIN
≤
V
DD
, Pin at high-imped-
ance
Vss
≤
V
PIN
≤
V
DD
Input Leakage Current
D090
D090A
I/O ports
(2)
V
DD
– 0.7
V
DD
– 0.7
—
—
—
—
V
V
Capacitive Loading Specs on Output Pins
D101
†
*
Note 1:
2:
3:
All I/O pins
—
—
50*
pF
Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
These parameters are for design guidance only and are not tested.
The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent
normal operating conditions. Higher leakage current may be measured at different input voltages.
Negative current is defined as coming out of the pin.
This specification applies when GP3/MCLR is configured as an input with pull-up disabled. The leakage current of the
MCLR circuit is higher than the standard I/O logic.
©
2007 Microchip Technology Inc.
DS41239D-page 67
MICROCHIP [ MICROCHIP TECHNOLOGY ]
