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PIC10F200T-I/OT 参数 Datasheet PDF下载

PIC10F200T-I/OT图片预览
型号: PIC10F200T-I/OT
PDF下载: 下载PDF文件 查看货源
内容描述: 6引脚8位闪存微控制器 [6-Pin, 8-Bit Flash Microcontrollers]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 96 页 / 1447 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC10F200/202/204/206  
4.2  
Program Memory Organization for  
the PIC10F202/206  
4.3  
Data Memory Organization  
Data memory is composed of registers or bytes of  
RAM. Therefore, data memory for a device is specified  
by its register file. The register file is divided into two  
functional groups: Special Function Registers (SFR)  
and General Purpose Registers (GPR).  
The PIC10F202/206 devices have a 10-bit Program  
Counter (PC) capable of addressing a 1024 x 12  
program memory space.  
Only the first 512 x 12 (0000h-01FFh) for the  
PIC10F202/206 are physically implemented (see  
Figure 4-2). Accessing  
boundaries will cause a wraparound within the first  
512 x 12 space (PIC10F202/206). The effective  
Reset vector is at 0000h (see Figure 4-2). Location  
01FFh (PIC10F202/206) contains the internal clock  
oscillator calibration value. This value should never  
be overwritten.  
The Special Function Registers include the TMR0 reg-  
ister, the Program Counter (PCL), the STATUS register,  
the I/O register (GPIO) and the File Select Register  
(FSR). In addition, Special Function Registers are used  
to control the I/O port configuration and prescaler  
options.  
a location above these  
The General Purpose registers are used for data and  
control information under command of the instructions.  
For the PIC10F200/204, the register file is composed of  
7 Special Function registers and 16 General Purpose  
registers (see Figure 4-3 and Figure 4-4).  
FIGURE 4-2:  
PROGRAM MEMORY MAP  
AND STACK FOR THE  
PIC10F202/206  
For the PIC10F202/206, the register file is composed of  
8 Special Function registers and 24 General Purpose  
registers (see Figure 4-4).  
PC<8:0>  
10  
CALL, RETLW  
Stack Level 1  
Stack Level 2  
4.3.1  
GENERAL PURPOSE REGISTER  
FILE  
The General Purpose Register file is accessed, either  
directly or indirectly, through the File Select Register  
(FSR). See Section 4.9 “Indirect Data Addressing:  
INDF and FSR Registers”.  
(1)  
Reset Vector  
0000h  
On-chip Program  
Memory  
512 Words  
01FFh  
0200h  
02FFh  
Note 1: Address 0000h becomes the  
effective Reset vector. Location  
01FFh contains the MOVLW XX  
internal oscillator calibration value.  
DS41239D-page 16  
© 2007 Microchip Technology Inc.  
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