MCP9808
4.1.1
DATA TRANSFER
4.0
4.1
SERIAL COMMUNICATION
Data transfers are initiated by a Start condition
(START), followed by a 7-bit device address and a
read/write bit. An Acknowledge (ACK) from the slave
confirms the reception of each byte. Each access must
be terminated by a Stop condition (STOP).
2
2-Wire Standard Mode I C™
Protocol Compatible Interface
The MCP9808 Serial Clock (SCL) input and the
bidirectional Serial Data (SDA) line form a 2-wire
bidirectional, Standard mode, I2C compatible
communication port (refer to the Digital Input/Output
Pin Characteristics and Sensor Serial Interface
Timing Specifications tables).
Repeated communication is initiated after tB-FREE
.
This device does not support sequential register
read/write. Each register needs to be addressed using
the Register Pointer.
This device supports the receive protocol. The register
can be specified using the pointer for the initial read.
Each repeated read or receive begins with a Start
condition and address byte. The MCP9808 retains the
previously selected register. Therefore, it outputs data
from the previously specified register (repeated pointer
specification is not necessary).
The following bus protocol has been defined:
TABLE 4-1:
MCP9808 SERIAL BUS
PROTOCOL DESCRIPTIONS
Term
Description
Master
The device that controls the serial bus,
typically a microcontroller.
4.1.2
MASTER/SLAVE
Slave
The device addressed by the master,
such as the MCP9808.
The bus is controlled by a master device (typically a
microcontroller) that controls the bus access and
generates the Start and Stop conditions. The MCP9808
is a slave device and does not control other devices in
the bus. Both master and slave devices can operate as
either transmitter or receiver. However, the master
device determines which mode is activated.
Transmitter Device sending data to the bus.
Receiver
START
Device receiving data from the bus.
A unique signal from the master to
initiate serial interface with a slave.
STOP
A unique signal from the master to
terminate serial interface from a slave.
4.1.3
START/STOP CONDITION
Read/Write A read or write to the MCP9808
registers.
A high-to-low transition of the SDA line (while SCL is
high) is the Start condition. All data transfers must be
preceded by a Start condition from the master. A
low-to-high transition of the SDA line (while SCL is
high) signifies a Stop condition.
ACK
A receiver Acknowledges (ACK) the
reception of each byte by polling the bus.
NAK
A receiver Not-Acknowledges (NAK) or
releases the bus to show End-of-Data
(EOD).
If a Start or Stop condition is introduced during data
transmission, the MCP9808 releases the bus. All data
transfers are ended by a Stop condition from the
master.
Busy
Communication is not possible
because the bus is in use.
Not Busy
The bus is in the Idle state; both SDA
and SCL remain high.
Data Valid SDA must remain stable before SCL
becomes high in order for a data bit to
be considered valid. During normal
data transfers, SDA only changes state
while SCL is low.
© 2011 Microchip Technology Inc.
DS25095A-page 13
MICROCHIP [ MICROCHIP ]
