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MCP4232-503E/MF 参数 Datasheet PDF下载

MCP4232-503E/MF图片预览
型号: MCP4232-503E/MF
PDF下载: 下载PDF文件 查看货源
内容描述: 7/8位单/双SPI数字电位器具有易失性存储器 [7/8-Bit Single/Dual SPI Digital POT with Volatile Memory]
分类和应用: 转换器电位器数字电位计存储电阻器光电二极管
文件页数/大小: 88 页 / 2525 K
品牌: MICROCHIP [ MICROCHIP ]
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MCP413X/415X/423X/425X  
Decrement commands can be sent repeatedly without  
raising CS until a desired condition is met. The value in  
the Volatile Wiper register can be read using a Read  
Command.  
7.8.2  
CONTINUOUS DECREMENTS  
Continuous Decrements are possible only when writing  
to the wiper registers.  
Figure 7-9 shows a continuous Decrement sequence  
for three continuous writes. The writes do not need to  
be to the same volatile memory address.  
When executing a continuous command string, The  
Decrement command can be followed by any other  
valid command.  
When executing an continuous Decrement commands,  
the selected wiper will be altered from n to n-1 for each  
Decrement command received. The wiper value will  
decrement from the wipers Full-Scale value (100h on  
8-bit devices and 80h on 7-bit devices). Above the  
wipers Full-Scale value (8-bit =101h to 1FFh,  
7-bit = 81h to FFh), the decrement command is  
disabled. If the Wiper register has a Zero Scale value  
(000h), then the wiper value will not decrement. See  
Table 7-4 for additional information on the Decrement  
Command vs. the current volatile wiper value.  
The wiper terminal will move after the command has  
been received (8th clock).  
After the wiper is decremented to the desired position,  
the CS pin should be forced to VIH to ensure that  
“unexpected” transitions (on the SCK pin do not cause  
the wiper setting to change). Driving the CS pin to VIH  
should occur as soon as possible (within device  
specifications) after the last desired decrement occurs.  
COMMAND BYTE  
COMMAND BYTE  
(DECR COMMAND (n-1) )  
COMMAND BYTE  
(DECR COMMAND (n-1) )  
(DECR COMMAND (n-1) )  
A
D
3
A
D
2
A
D
1
A
D
0
1
0
X
X
A
D
3
A
D
2
A
D
1
A
D
0
1
0
X
X
A
D
3
A
D
2
A
D
1
A
D
0
1
0
X
X
SDI  
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1*  
0
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1*  
0
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1*  
0
1
0
0
0
Note 1, 2  
Note 3, 4  
Note 3, 4  
Note 3, 4  
SDO  
1
0
0
1
1
0
Note 1: Only functions when writing the volatile wiper registers (AD3:AD0) 0h and 1h.  
2: Valid Address/Command combination.  
3: Invalid Address/Command combination.  
4: If an Error Condition occurs (CMDERR = L), all following SDO bits will be low until the CMDERR  
condition is cleared (the CS pin is forced to the inactive state).  
FIGURE 7-9:  
Continuous Decrement Command - SDI and SDO States.  
DS22060B-page 58  
© 2008 Microchip Technology Inc.  
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