MCP413X/415X/423X/425X
Typical SPI Interfaces are shown in Figure 6-1. In the
SPI interface, The Master’s Output pin is connected to
the Slave’s Input pin and the Master’s Input pin is
connected to the Slave’s Output pin.
6.0
SERIAL INTERFACE (SPI)
The MCP4XXX devices support the SPI serial protocol.
This SPI operates in the slave mode (does not
generate the serial clock).
The MCP4XXX SPI’s module supports two (of the four)
standard SPI modes. These are Mode 0,0and 1,1.
The SPI mode is determined by the state of the SCK
pin (VIH or VIL) on the when the CS pin transitions from
inactive (VIH) to active (VIL or VIHH).
The SPI interface uses up to four pins. These are:
• CS - Chip Select
• SCK - Serial Clock
• SDI - Serial Data In
• SDO - Serial Data Out
All SPI interface signals are high-voltage tolerant.
Typical SPI Interface Connections
Host
MCP4XXX
Controller
( Master Out - Slave In (MOSI) )
( Master In - Slave Out (MISO) )
SDI
SDO
SCK
CS
SDO
SDI
SCK
I/O (1)
Typical MCP41X1 SPI Interface Connections (Host Controller Hardware SPI)
Host
MCP41X1
Controller
SDI/SDO
SDO
SDI
(2)
R1
SDI
SDO
SCK
SCK
CS
I/O (1)
Alternate MCP41X1 SPI Interface Connections (Host Controller Firmware SPI)
Host
MCP41X1
Controller
SDI/SDO
I/O
SDI
(SDO/SDI)
SDO
I/O
SCK
CS
(SCK)
I/O (1)
Note 1: If High voltage commands are desired, some type of external circuitry needs to be
implemented.
2: R1 must be sized to ensure VIL and VIH of the devices are met.
FIGURE 6-1:
Typical SPI Interface Block Diagram.
© 2008 Microchip Technology Inc.
DS22060B-page 41
MICROCHIP [ MICROCHIP ]
