MCP3201
t
CSH
CS
t
SUCS
t
HI
t
LO
CLK
t
EN
D
OUT
HI-Z
t
DO
NULL BIT
MSB OUT
t
R
t
F
t
DIS
LSB
HI-Z
FIGURE 1-1:
Serial Timing.
Load circuit for t
DIS
and t
EN
Test Point
V
DD
3 kΩ
Test Point
D
OUT
C
L
= 30 pF
V
DD
/2
t
DIS
Waveform 2
t
EN
Waveform
t
DIS
Waveform 1
Load circuit for t
R
, t
F
, t
DO
1.4V
D
OUT
3 kΩ
30 pF
V
SS
Voltage Waveforms for t
R
, t
F
D
OUT
t
R
t
F
V
OH
V
OL
Voltage Waveforms for t
EN
CS
CLK
D
OUT
t
EN
1
2
3
4
B9
Voltage Waveforms for t
DO
CS
CLK
t
DO
D
OUT
Voltage Waveforms for t
DIS
V
IH
90%
t
DIS
D
OUT
Waveform 2†
10%
D
OUT
Waveform 1*
* Waveform 1 is for an output with internal condi-
tions such that the output is high, unless disabled
by the output control.
† Waveform 2 is for an output with internal condi-
tions such that the output is low, unless disabled
by the output control.
FIGURE 1-2:
Test Circuits.
©
2008 Microchip Technology Inc.
DS21290E-page 5