MCP3204/3208
ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics:
Unless otherwise noted, all parameters apply at V
DD
= 5V, V
SS
= 0V, V
REF
= 5V,
T
AMB
= -40°C to +85°C,f
SAMPLE
= 100 ksps and f
CLK
= 20*f
SAMPLE
Parameters
Analog Inputs
Input Voltage Range for CH0-
CH7 in Single-Ended Mode
Input Voltage Range for IN+ in
pseudo-differential Mode
Input Voltage Range for IN- in
pseudo-differential Mode
Leakage Current
Switch Resistance
Sample Capacitor
Digital Input/Output
Data Coding Format
High Level Input Voltage
Low Level Input Voltage
High Level Output Voltage
Low Level Output Voltage
Input Leakage Current
Output Leakage Current
Pin Capacitance
(All Inputs/Outputs)
Timing Parameters
Clock Frequency
Clock High Time
Clock Low Time
CS Fall To First Rising CLK
Edge
Data Input Setup Time
Data Input Hold Time
CLK Fall To Output Data Valid
CLK Fall To Output Enable
CS Rise To Output Disable
CS Disable Time
D
OUT
Rise Time
D
OUT
Fall Time
Power Requirements
Operating Voltage
Operating Current
Standby Current
V
DD
I
DD
I
DDS
2.7
—
—
—
—
320
225
0.5
5.5
400
—
2.0
V
µA
µA
V
DD
=V
REF
= 5V, D
OUT
unloaded
V
DD
=V
REF
= 2.7V, D
OUT
unloaded
CS = V
DD
= 5.0V
f
CLK
t
HI
t
LO
t
SUCS
t
SU
t
HD
t
DO
t
EN
t
DIS
t
CSH
t
R
t
F
—
—
250
250
100
—
—
—
—
—
500
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
2.0
1.0
—
—
—
50
50
200
200
100
—
100
100
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
See Figures 1-2 and 1-3 (Note
See Figures 1-2 and 1-3 (Note
See Figures 1-2 and 1-3
See Figures 1-2 and 1-3
See Figures 1-2 and 1-3
V
DD
= 5V (Note
V
DD
= 2.7V (Note
V
IH
V
IL
V
OH
V
OL
I
LI
I
LO
C
IN
,C
OUT
—
4.1
—
-10
-10
—
Straight Binary
0.7 V
DD
—
—
—
—
—
—
—
—
0.3 V
DD
—
0.4
10
10
10
V
V
V
V
µA
µA
pF
I
OH
= -1 mA, V
DD
= 4.5V
I
OL
= 1 mA, V
DD
= 4.5V
V
IN
= V
SS
or V
DD
V
OUT
= V
SS
or V
DD
V
DD
= 5.0V (Note
T
AMB
= 25°C, f = 1 MHz
V
SS
IN-
V
SS
-100
—
—
—
—
—
—
0.001
1000
20
V
REF
V
REF
+IN-
V
SS
+100
±1
—
—
mV
µA
Ω
pF
See Figure 4-1
See Figure 4-1
V
Sym
Min
Typ
Max
Units
Conditions
Note 1:
This parameter is established by characterization and not 100% tested.
2:
See graphs that relate linearity performance to V
REF
levels.
3:
Because the sample cap will eventually lose charge, effective clock rates below 10 kHz can affect linearity
performance, particularly at elevated temperatures. See Section 6.2, “Maintaining Minimum Clock Speed”,
for more information.
©
2007 Microchip Technology Inc.
DS21298D-page 3
MICROCHIP [ MICROCHIP TECHNOLOGY ]
