MCP3202
t
CSH
CS
t
SUCS
t
HI
CLK
t
SU
D
IN
t
HD
t
LO
MSB IN
t
EN
t
DO
NULL BIT
MSB OUT
t
R
t
F
LSB
t
DIS
D
OUT
FIGURE 1-1:
Serial Timing.
Load circuit for t
DIS
and t
EN
Test Point
V
DD
3 kΩ
Test Point
D
OUT
C
L
= 100 pF
100 pF
V
SS
3 kΩ
V
DD
/2
t
DIS
Waveform 2
t
EN
Waveform
t
DIS
Waveform 1
Load circuit for t
R
, t
F
, t
DO
1.4V
D
OUT
Voltage Waveforms for t
R
, t
F
D
OUT
t
R
t
F
CLK
D
OUT
V
OH
V
OL
Voltage Waveforms for t
EN
CS
1
2
3
4
B11
t
EN
Voltage Waveforms for t
DO
CLK
t
DO
D
OUT
Voltage Waveforms for t
DIS
CS
D
OUT
Waveform 1*
T
DIS
D
OUT
Waveform 2†
10%
V
IH
90%
*
Waveform 1 is for an output with internal conditions such that
the output is high, unless disabled by the output control.
† Waveform 2 is for an output with internal conditions such that
the output is low, unless disabled by the output control.
FIGURE 1-2:
Test Circuits.
DS21034D-page 4
©
2006 Microchip Technology Inc.
MICROCHIP [ MICROCHIP TECHNOLOGY ]
