MCP23018/MCP23S18
The pull up resistors are individually configured and
can be enabled when the pin is cofigured as an input or
output.
1.5
GPIO Port
The GPIO module is a general purpose 16-bit wide
bidirectional port which is functionally split into two (2)
8-bit wide ports.
Reading the GPIOn register reads the value on the
port. Reading the OLATn register only reads the
latches, not the actual value on the port.
The outputs are open-drain.
The GPIO module contains the data ports (GPIOn),
internal pull up resistors and the Output Latches
(OLATn).
Writing to the GPIOn register actually causes a write to
the latches (OLATn). Writing to the OLATn register
forces the associated output drivers to drive to the level
in OLATn. Pins configured as inputs turn off the associ-
ated output driver and put it in high-impedance.
TABLE 1-2:
SUMMARY OF REGISTERS ASSOCIATED WITH THE GPIO PORTS (BANK = 1)
Register
Name
Address
(hex)
POR/RST
value
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
IODIRA
IPOLA
00
01
02
06
09
0A
10
11
12
16
19
1A
IO7
IP7
IO6
IP6
IO5
IP5
IO4
IP4
IO3
IP3
IO2
IP2
IO1
IP1
IO0
IP0
1111 1111
0000 0000
GPINTENA
GPPUA
GPIOA
GPINT7 GPINT6 GPINT5 GPINT4 GPINT3 GPINT2 GPINT1 GPINT0 0000 0000
PU7
GP7
OL7
IO7
PU6
GP6
OL6
IO6
PU5
GP5
OL5
IO5
PU4
GP4
OL4
IO4
PU3
GP3
OL3
IO3
PU2
GP2
OL2
IO2
PU1
GP1
OL1
IO1
PU0
GP0
OL0
IO0
0000 0000
0000 0000
0000 0000
1111 1111
0000 0000
OLATA
IODIRB
IPOLB
IP7
IP6
IP5
IP4
IP3
IP2
IP1
IP0
GPINTENB
GPPUB
GPIOB
GPINT7 GPINT6 GPINT5 GPINT4 GPINT3 GPINT2 GPINT1 GPINT0 0000 0000
PU7
GP7
OL7
PU6
GP6
OL6
PU5
GP5
OL5
PU4
GP4
OL4
PU3
GP3
OL3
PU2
GP2
OL2
PU1
GP1
OL1
PU0
GP0
OL0
0000 0000
0000 0000
0000 0000
OLATB
TABLE 1-3:
SUMMARY OF REGISTERS ASSOCIATED WITH THE GPIO PORTS (BANK = 0)
Register
Name
Address
(hex)
POR/RST
value
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
IODIRA
IODIRB
IPOLA
00
01
02
03
04
05
0C
0D
12
13
14
15
IO7
IO7
IP7
IP7
IO6
IO6
IP6
IP6
IO5
IO5
IP5
IP5
IO4
IO4
IP4
IP4
IO3
IO3
IP3
IP3
IO2
IO2
IP2
IP2
IO1
IO1
IP1
IP1
IO0
IO0
IP0
IP0
1111 1111
1111 1111
0000 0000
0000 0000
IPOLB
GPINTENA
GPINTENB
GPPUA
GPPUB
GPIOA
GPINT7 GPINT6 GPINT5 GPINT4 GPINT3 GPINT2 GPINT1 GPINT0 0000 0000
GPINT7 GPINT6 GPINT5 GPINT4 GPINT3 GPINT2 GPINT1 GPINT0 0000 0000
PU7
PU7
GP7
GP7
OL7
OL7
PU6
PU6
GP6
GP6
OL6
OL6
PU5
PU5
GP5
GP5
OL5
OL5
PU4
PU4
GP4
GP4
OL4
OL4
PU3
PU3
GP3
GP3
OL3
OL3
PU2
PU2
GP2
GP2
OL2
OL2
PU1
PU1
GP1
GP1
OL1
OL1
PU0
PU0
GP0
GP0
OL0
OL0
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
GPIOB
OLATA
OLATB
© 2008 Microchip Technology Inc.
DS22103A-page 15