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MCP23016-I/SO 参数 Datasheet PDF下载

MCP23016-I/SO图片预览
型号: MCP23016-I/SO
PDF下载: 下载PDF文件 查看货源
内容描述: 16位I2C⑩ I / O扩展器 [16-Bit I2C⑩ I/O Expander]
分类和应用: 并行IO端口微控制器和处理器外围集成电路光电二极管PC
文件页数/大小: 38 页 / 544 K
品牌: MICROCHIP [ MICROCHIP TECHNOLOGY ]
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MCP23016
1.0
DEVICE OVERVIEW
The MCP23016 device provides 16-bit, general
purpose, parallel I/O expansion for I
2
C bus
applications.
This device includes high-current drive capability, low
supply current and individual I/O configuration. I/O
expanders provide a simple solution when additional
I/Os are needed for ACPI, power switches, sensors,
push buttons, LEDs and so on.
The MCP23016 consists of multiple 8-bit configuration
registers for input, output and polarity selection. The
system master can enable the I/Os as either inputs or
outputs by writing the I/O configuration bits. The data
for each input or output is kept in the corresponding
input or output register. The polarity of the read register
can be inverted with the polarity inversion register (see
All
registers can be read by the system master.
The open-drain interrupt output is activated when any
input state differs from its corresponding input port
register state. This is used to indicate to the system
master that an input state has changed. The interrupt
capture register captures port value at this time. The
Power-on Reset sets the registers to their default val-
ues and initializes the device state machine.
Three device inputs (A0 - A2) determine the I
2
C
address and allow up to eight I/O expander devices to
share the same I
2
C bus.
1.1
Pin Descriptions
PINOUT DESCRIPTION
PDIP,
SOIC,
SSOP
Pin No.
9
10
2
3
4
5
7
11
12
13
21
22
23
24
25
26
27
28
14
15
6
16
17
18
1, 8, 19
20
QFN
Pin No.
6
7
27
28
1
2
4
8
9
10
18
19
20
21
22
23
24
25
11
12
3
13
14
15
5, 16, 26
17
I/O/P
Type
I
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I/O
O
I
I
I
P
P
Buffer
Type
ST
TTL
TTL
TTL
TTL
TTL
ST
ST
ST
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
ST
ST
OD
ST
ST
ST
Description
TABLE 1-1:
Pin Name
CLK
TP
GP1.0
GP1.1
GP1.2
GP1.3
GP1.4
GP1.5
GP1.6
GP1.7
GP0.0
GP0.1
GP0.2
GP0.3
GP0.4
GP0.5
GP0.6
GP0.7
SCL
SDA
INT
A0
A1
A2
V
SS
V
DD
Clock source input
Test Pin (This pin must be left floating)
D0 digital input/output for GP1
D1 digital input/output for GP1
D2 digital input/output for GP1
D3 digital input/output for GP1
D4 digital input/output for GP1
D5 digital input/output for GP1
D6 digital input/output for GP1
D7 digital input/output for GP1
D0 digital input/output for GP0
D1 digital input/output for GP0
D2 digital input/output for GP0
D3 digital input/output for GP0
D4 digital input/output for GP0
D5 digital input/output for GP0
D6 digital input/output for GP0
D7 digital input/output for GP0
Serial clock input
Serial data I/O
Interrupt output
Address input 1
Address input 2
Address input 3
Ground reference for logic and I/O pins
Positive supply for logic and I/O pins
©
2007 Microchip Technology Inc.
DS20090C-page 3