MCP23016
1.7.5
INTERRUPT CAPTURE REGISTERS
Two registers contain the value of the port that
generated the interrupt:
• INTCAP0 contains the value of GP0 at time of
GP0 change interrupt
• INTCAP1 contains the value of GP1 at time of
GP1 change interrupt
These registers are ‘read-only’ registers (A write to
these registers is ignored).
REGISTER 1-9:
R-x
INTCAP0 - INTERRUPT CAPTURED VALUE FOR PORT REGISTER 0
R-x
R-x
R-x
R-x
R-x
R-x
R-x
ICP0.0
bit 0
ICP0.7
bit 7
ICP0.6
ICP0.5
ICP0.4
ICP0.3
ICP0.2
ICP0.1
bit 7-0
ICP0.0:ICP0.7: Reflects the logic level on the GP0 pins at the time of interrupt due to pin
change
1= Logic ‘1’
0= Logic ‘0’
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
- n = Value at POR
‘1’ = Bit is set
REGISTER 1-10: INTCAP1 - INTERRUPT CAPTURED VALUE FOR PORT REGISTER 1
R-x
ICP1.7
bit 7
R-x
R-x
R-x
R-x
R-x
R-x
R-x
ICP1.0
bit 0
ICP1.6
ICP1.5
ICP1.4
ICP1.3
ICP1.2
ICP1.1
bit 7-0
ICP1.0:ICP1.7: Reflects the logic level on the GP1 pins at the time of interrupt due to pin
change
1= Logic ‘1’
0= Logic ‘0’
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
- n = Value at POR
‘1’ = Bit is set
DS20090C-page 10
© 2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
