MCP2210
TABLE 3-40: COMMAND STRUCTURE (CONTINUED)
Byte
Meaning
Index
17
Other Chip Settings – Enable/Disable Wake-up, Interrupt Counting, SPI Bus Release Options
• Bit 7 – Don’t Care
• Bit 6 – Don’t Care
• Bit 5 – Don’t Care
• Bit 4 – Remote Wake-up Enabled/Disabled
- 0– Remote Wake-up Disabled
- 1– Remote Wake-up Enabled
• Bit 3 – Dedicated Function – Interrupt Pin mode
• Bit 2 – Dedicated Function – Interrupt Pin mode
• Bit 1 – Dedicated Function – Interrupt Pin mode
- b111– Reserved
- b110– Reserved
- b101– Reserved
- b100– Count High Pulses
- b011– Count Low Pulses
- b100– Count High Pulses
- b011– Count Low Pulses
- b010– Count Rising Edges
- b001– Count Falling Edges
- b000– No Interrupt Counting
• Bit 0 – SPI Bus Release Enable
- 0= SPI Bus is Released between transfer
- 1= SPI Bus is Not Released by the MCP2210 between transfers
Reserved (fill in with 0x00)
18-63
DS22288A-page 44
2011 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
