MCP1401/02
4.0
4.1
APPLICATION INFORMATION
VDD = 18V
1 µF
General Information
0.1 µF
Ceramic
MOSFET drivers are high-speed, high current devices
which are intended to source/sink high peak currents to
charge/discharge the gate capacitance of external
MOSFETs or IGBTs. In high frequency switching power
supplies, the PWM controller may not have the drive
capability to directly drive the power MOSFET. A MOS-
FET driver like the MCP1401/02 family can be used to
provide additional source/sink current capability.
Input
Output
CL = 470 pF
MCP1402
4.2
MOSFET Driver Timing
The ability of a MOSFET driver to transition from a fully
off state to a fully on state are characterized by the
drivers rise time (tR), fall time (tF), and propagation
delays (tD1 and tD2). The MCP1401/02 family of drivers
can typically charge and discharge a 470 pF load
capacitance in 19 ns along with a typical matched
propagation delay of 35 ns. Figure 4-1 and Figure 4-2
show the test circuit and timing waveform used to verify
the MCP1401/02 timing.
+5V
90%
Input
10%
0V
18V
90%
90%
tD1
tD2
tF
tR
Output
0V
10%
10%
VDD = 18V
FIGURE 4-2:
Non-Inverting Driver Timing
Waveform.
0.1 µF
Ceramic
1 µF
4.3
Decoupling Capacitors
Careful layout and decoupling capacitors are highly
recommended when using MOSFET drivers. Large
currents are required to charge and discharge
capacitive loads quickly. For example, approximately
550 mA are needed to charge a 470 pF load with 18V
in 15 ns.
Input
Output
CL = 470 pF
MCP1401
To operate the MOSFET driver over a wide frequency
range with low supply impedance, a ceramic and low
ESR film capacitor is recommended to be placed in
parallel between the driver VDD and GND. A 1.0 µF low
ESR film capacitor and a 0.1 µF ceramic capacitor
placed between pins 2 and 1 should be used. These
capacitors should be placed close to the driver to
minimized circuit board parasitics and provide a local
source for the required current.
+5V
90%
Input
0V
10%
tD1
90%
10%
Inverting Driver Timing
tD2
tF
tR
18V
90%
Output
4.4
PCB Layout Considerations
10%
0V
Proper PCB layout is important in a high current, fast
switching circuit to provide proper device operation and
robustness of design. PCB trace loop area and
inductance should be minimized by the use of ground
planes or trace under MOSFET gate drive signals,
separate analog and power grounds, and local driver
decoupling.
FIGURE 4-1:
Waveform.
Placing a ground plane beneath the MCP1401/02 will
help as a radiated noise shield as well as providing
some heat sinking for power dissipated within the
device.
DS22052A-page 10
© 2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
