LMC7101
Micrel, Inc.
Application Information
0.011V
R
=
= 8.8 ≈ 9Ω
OUT
0.001245A
Input Common-Mode Voltage
Driving Capacitive Loads
Some amplifiers exhibit undesirable or unpredictable perfor-
mancewhentheinputsaredrivenbeyondthecommon-mode
voltage range, for example, phase inversion of the output
signal. The LMC7101 tolerates input overdrive by at least
200mV beyond either rail without producing phase inversion.
Drivingacapacitiveloadintroducesphase-lagintotheoutput
signal,andthisinturnreducesop-ampsystemphasemargin.
The application that is least forgiving of reduced phase
margin is a unity gain amplifier. The LMC7101 can typically
drivea100pFcapacitiveloadconnecteddirectlytotheoutput
when configured as a unity-gain amplifier.
If the absolute maximum input voltage (700mV beyond either
rail) is exceeded, the input current should be limited to ±5mA
maximum to prevent reducing reliability. A 10kΩ series input
resistor, used as a current limiter, will protect the input
structure from voltages as large as 50V above the supply or
below ground. See Figure 1.
Using Large-Value Feedback Resistors
A large-value feedback resistor (> 500kΩ) can reduce the
phase margin of a system. This occurs when the feedback
resistor acts in conjunction with input capacitance to create
phase lag in the fedback signal. Input capacitance is usually
a combination of input circuit components and other parasitic
capacitance, such as amplifier input capacitance and stray
printed circuit board capacitance.
VOUT
RIN
Figure 2 illustrates a method of compensating phase lag
caused by using a large-value feedback resistor. Feedback
VIN
10kΩ
capacitor C introduces sufficient phase lead to overcome
FB
the phase lag caused by feedback resistor R and input
FB
Figure 1. Input Current-Limit Protection
Output Voltage Swing
capacitance C . The value of C is determined by first
IN
FB
estimating C and then applying the following formula:
IN
Sink and source output resistances of the LMC7101 are
equal. Maximum output voltage swing is determined by the
load and the approximate output resistance. The output
resistance is:
RIN × CIN ≤ RFB × CFB
CFB
RFB
V
LOAD
DROP
R
=
RIN
OUT
I
VIN
VOUT
V
is the voltage dropped within the amplifier output
DROP
CIN
stage. V
and I
can be determined from the V
DROP
LOAD O
(outputswing)portionoftheappropriateElectricalCharacter-
istics table. I is equal to the typical output high voltage
LOAD
minus V+/2 and divided by R
. For example, using the
LOAD
Figure 2. Cancelling Feedback Phase Lag
Electrical Characteristics DC (5V) table, the typical output
high voltage using a 2kΩ load (connected to V+/2) is 4.989V,
SinceasignificantpercentageofC maybecausedbyboard
IN
which produces an I
of
LOAD
layout, it is important to note that the correct value of C may
FB
change when changing from a breadboard to the final circuit
layout.
4.989V – 2.5V
.
= 1.245mA
1.245mA
2kΩ
Voltage drop in the amplifier output stage is:
V
V
= 5.0V – 4.989V
= 0.011V
DROP
DROP
Becauseofoutputstagesymmetry,thecorrespondingtypical
output low voltage (0.011V) also equals V
. Then:
DROP
February 2005
9
LMC7101
MICROCHIP [ MICROCHIP ]
