Micrel, Inc.
KSZ8041NL/RNL
Receive Data Valid (RXDV)
RXDV is driven by the PHY to indicate that the PHY is presenting recovered and decoded nibbles on RXD[3:0].
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In 10Mbps mode, RXDV is asserted with the first nibble of the SFD (Start of Frame Delimiter), “5D”, and remains
asserted until the end of the frame.
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In 100Mbps mode, RXDV is asserted from the first nibble of the preamble to the last nibble of the frame.
RXDV transitions synchronously with respect to RXC.
Receive Data [3:0] (RXD[3:0])
RXD[3:0] transitions synchronously with respect to RXC. For each clock period in which RXDV is asserted, RXD[3:0]
transfers a nibble of recovered data from the PHY.
Receive Error (RXER)
RXER is asserted for one or more RXC periods to indicate that a Symbol Error (e.g. a coding error that a PHY is capable
of detecting, and that may otherwise be undetectable by the MAC sub-layer) was detected somewhere in the frame
presently being transferred from the PHY.
RXER transitions synchronously with respect to RXC. While RXDV is de-asserted, RXER has no effect on the MAC.
Carrier Sense (CRS)
CRS is asserted and de-asserted as follows:
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In 10Mbps mode, CRS assertion is based on the reception of valid preambles. CRS de-assertion is based on the
reception of an end-of-frame (EOF) marker.
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In 100Mbps mode, CRS is asserted when a start-of-stream delimiter, or /J/K symbol pair is detected. CRS is de-
asserted when an end-of-stream delimiter, or /T/R symbol pair is detected. Additionally, the PMA layer de-asserts
CRS if IDLE symbols are received without /T/R.
Collision (COL)
COL is asserted in half-duplex mode whenever the transmitter and receiver are simultaneously active on the line. This is
used to inform the MAC that a collision has occurred during its transmission to the PHY.
COL transitions asynchronously with respect to TXC and RXC.
Reduced MII (RMII) Data Interface
The Reduced Media Independent Interface (RMII) specifies a low pin count Media Independent Interface (MII). It provides
a common interface between physical layer and MAC layer devices, and has the following key characteristics:
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Supports 10Mbps and 100Mbps data rates.
Uses a 50MHz reference clock.
Provides independent 2-bit wide (di-bit) transmit and receive data paths.
Contains two distinct groups of signals: one for transmission and the other for reception.
The KSZ8041NL is configured in RMII mode after it is power-up or reset with the following:
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A 50MHz reference clock connected to REFCLK (pin 9).
CONFIG[2:0] (pins 18, 29, 28) set to ‘001’.
The KSZ8041RNL is configured in RMII mode and outputs the 50MHz RMII reference clock to the MAC on REF_CLK (pin
19) after it is power-up or reset with the following:
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A 25MHz crystal connected to XI (pin 9) and XO (pin 8), or a 25MHz reference clock connected to XI (pin 9).
CONFIG[2:0] (pins 18, 29, 28) set to ‘001’.
In RMII mode, unused MII signals, TXD[3:2] (pins 27, 26), are tied to ground.
September 2010
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M9999-090910-1.4
MICROCHIP [ MICROCHIP ]
