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HCS300-I/SN 参数 Datasheet PDF下载

HCS300-I/SN图片预览
型号: HCS300-I/SN
PDF下载: 下载PDF文件 查看货源
内容描述: KEE LOQ跳码编码器 [KEE LOQ Code Hopping Encoder]
分类和应用: 电信集成电路电信加密电路电信电路光电二极管编码器PC
文件页数/大小: 28 页 / 383 K
品牌: MICROCHIP [ MICROCHIP TECHNOLOGY ]
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HCS300
6.0
PROGRAMMING THE HCS300
When using the HCS300 in a system, the user will have
to program some parameters into the device including
the serial number and the secret key before it can be
used. The programming cycle allows the user to input
all 192 bits in a serial data stream, which are then
stored internally in EEPROM. Programming will be
initiated by forcing the PWM line high, after the S2 (or
S3) line has been held high for the appropriate length
of time line (Table 6-1 and Figure 6-1). After the Pro-
gram mode is entered, a delay must be provided to the
device for the automatic bulk write cycle to complete.
This will set all locations in the EEPROM to zeros. The
device can then be programmed by clocking in 16 bits
at a time, using S2 (or S3) as the clock line and PWM
as the data in line. After each 16-bit word is loaded, a
programming delay is required for the internal program
cycle to complete. This delay can take up to T
WC
. At the
end of the programming cycle, the device can be veri-
fied (Figure 6-2) by reading back the EEPROM. Read-
ing is done by clocking the S2 (or S3) line and reading
the data bits on PWM. For security reasons, it is not
possible to execute a verify function without first pro-
gramming the EEPROM.
A Verify operation can only
be done once, immediately following the Program
cycle.
Note:
To ensure that the device does not acci-
dentally enter Programming mode, PWM
should never be pulled high by the circuit
connected to it. Special care should be
taken when driving PNP RF transistors.
FIGURE 6-1:
PROGRAMMING WAVEFORMS
T
PBW
T
CLKH
T
DS
T
WC
Enter Program
Mode
S2 (S3)
(Clock)
T
PS
T
PH
1
PWM
(Data)
T
PH
2
T
CLKL
Bit 0
Bit 1
Bit 2
T
DH
Bit 3
Bit 14
Bit 15
Bit 16
Bit 17
Data for Word 0 (KEY_0)
Repeat for each word (12 times)
Data for Word 1
Note 1:
Unused button inputs to be held to ground during the entire programming sequence.
2:
The V
DD
pin must be taken to ground after a Program/Verify cycle.
FIGURE 6-2:
VERIFY WAVEFORMS
Beginning of Verify Cycle
Data from Word 0
End of Programming Cycle
PWM
(Data)
S2 (S3)
(Clock)
Bit190 Bit191
Bit 0
Bit 1 Bit 2
Bit 3
Bit 14
Bit 15
Bit 16 Bit 17
Bit190 Bit191
T
WC
T
DV
Note:
If a Verify operation is to be done, then it must immediately follow the Program cycle.
DS21137F-page 12
©
2001 Microchip Technology Inc.