ENC28J60
TABLE 7-4:
SUMMARY OF REGISTERS USED FOR PACKET RECEPTION
Reset
Values
on page
Register
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
EIE
INTIE
—
PKTIE
PKTIF
DMAIE
DMAIF
r
LINKIE
LINKIF
LATECOL
r
TXIE
TXIF
—
r
r
TXERIE
TXERIF
TXABRT
—
RXERIE
RXERIF
CLKRDY
—
13
13
13
13
13
13
13
13
13
13
13
14
14
14
14
14
14
EIR
ESTAT
ECON2
ECON1
ERXSTL
ERXSTH
ERXNDL
ERXNDH
INT
BUFER
PKTDEC
RXRST
RXBUSY
—
AUTOINC
TXRST
PWRSV
DMAST
VRPS
TXRTS
CSUMEN
RXEN
BSEL1
BSEL0
RX Start Low Byte (ERXST<7:0>)
—
—
—
RX Start High Byte (ERXST<12:8>)
RX End High Byte (ERXND<12:8>)
RX End Low Byte (ERXND<7:0>)
—
—
—
ERXRDPTL RX RD Pointer Low Byte (ERXRDPT<7:0>)
ERXRDPTH
ERXFCON
EPKTCNT
MACON1
MACON3
MAMXFLL
MAMXFLH
Legend:
—
—
—
RX RD Pointer High Byte (ERXRDPT<12:8>)
UCEN
ANDOR
CRCEN
PMEN
MPEN
HTEN
MCEN
BCEN
Ethernet Packet Count
—
—
—
r
TXPAUS
RXPAUS
PASSALL
MARXEN
FULDPX
PADCFG2 PADCFG1 PADCFG0 TXCRCEN PHDREN
Maximum Frame Length Low Byte (MAMXFL<7:0>)
HFRMEN FRMLNEN
Maximum Frame Length High Byte (MAMXFL<15:8>)
— = unimplemented, r = reserved bit. Shaded cells are not used.
DS39662B-page 46
Preliminary
© 2006 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
