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ENC28J60-I/ML 参数 Datasheet PDF下载

ENC28J60-I/ML图片预览
型号: ENC28J60-I/ML
PDF下载: 下载PDF文件 查看货源
内容描述: 独立以太网控制器,SPI接口 [Stand-Alone Ethernet Controller with SPI Interface]
分类和应用: 微控制器和处理器串行IO控制器通信控制器外围集成电路数据传输PC局域网以太网时钟
文件页数/大小: 96 页 / 1466 K
品牌: MICROCHIP [ MICROCHIP TECHNOLOGY ]
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ENC28J60
8.0
RECEIVE FILTERS
To minimize the processing requirements of the host
controller, the ENC28J60 incorporates several different
receive filters which can automatically reject packets
which are not needed. Six different types of packet
filters are implemented:
Unicast
Pattern Match
Magic Packet™
Hash Table
Multicast
Broadcast
The individual filters are all configured by the ERXFCON
register (Register 8-1). More than one filter can be active
at any given time. Additionally, the filters can be config-
ured by the ANDOR bit to either logically AND, or
logically OR, the tests of several filters. In other words,
the filters may be set so that only packets accepted by
all active filters are accepted, or a packet accepted by
any one filter is accepted. The flowcharts in Figure 8-1
and Figure 8-2 show the effect that each of the filters will
have depending on the setting of ANDOR.
The device can enter Promiscuous mode and receive
all packets by clearing the ERXFCON register. The
proper setting of the register will depend on the
application requirements.
©
2006 Microchip Technology Inc.
Preliminary
DS39662B-page 47