ENC28J60
The command is started by pulling the CS pin low. The
SRC opcode is the sent, followed by a 5-bit Soft Reset
command constant of 1Fh. The SRC operation is termi-
nated by raising the CS pin.
4.2.7
SYSTEM RESET COMMAND
The System Reset Command (SRC) allows the host
controller to issue a System Soft Reset command.
Unlike other SPI commands, the SRC is only a single-
byte command and does not operate on any register.
Figure 4-7 shows a detailed illustration of the System
Reset Command sequence. For more information on
SRC’s Soft Reset, refer to Section 11.2 “System
Reset”.
FIGURE 4-7:
SYSTEM RESET COMMAND SEQUENCE
CS
0
1
2
3
4
5
6
7
SCK
Opcode
Data Constant (1Fh)
SI
1
1
1
1
1
1
1
1
High-Impedance State
SO
DS39662B-page 30
Preliminary
© 2006 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
