dsPIC33FJXXXGPXXX/
dsPIC33FJXXXMCXXX
dsPIC33F Rev. A2 Silicon Errata
dsPIC33FJXXXGPXXX,
dsPIC33FJXXXMCXXX
(Rev. A2) Silicon Errata
The dsPIC33F devices (Rev. A2) you received were
found to conform to the specifications and functionality
described in the following documents:
• DS70165 – “dsPIC33F
Family Data Sheet”
• DS70157 – “dsPIC30F/33F
Programmer’s
Reference Manual”
• DS70046 –
“dsPIC30F Family Reference Manual”
The exceptions to the specifications in the documents
listed above are described in this section. The specific
devices for which these exceptions are described are
listed below:
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dsPIC33FJ64GP206
dsPIC33FJ64GP306
dsPIC33FJ64GP310
dsPIC33FJ64GP706
dsPIC33FJ64GP708
dsPIC33FJ64GP710
dsPIC33FJ128GP206
dsPIC33FJ128GP306
dsPIC33FJ128GP310
dsPIC33FJ128GP706
dsPIC33FJ128GP708
dsPIC33FJ128GP710
dsPIC33FJ256GP506
dsPIC33FJ256GP510
dsPIC33FJ256GP710
dsPIC33FJ64MC506
dsPIC33FJ64MC508
dsPIC33FJ64MC510
dsPIC33FJ64MC706
dsPIC33FJ64MC710
dsPIC33FJ128MC506
dsPIC33FJ128MC510
dsPIC33FJ128MC706
dsPIC33FJ128MC708
dsPIC33FJ128MC710
dsPIC33FJ256MC510
dsPIC33FJ256MC710
dsPIC33F Rev. A2 silicon is identified by performing a
“Reset and Connect” operation to the device using
MPLAB
®
ICD 2 with MPLAB IDE v7.40 or later. The
output window will show a successful connection to the
device specified in
Configure>Select Device.
The errata described in this section will be addressed
in future revisions of silicon.
Silicon Errata Summary
The following list summarizes the errata described in
further detail through the remainder of this document:
1.
Doze Mode
When Doze mode is enabled, any writes to a
peripheral SFR can cause other updates to that
register to cease to function for the duration of the
current CPU clock cycle.
2.
12-bit Analog-to-Digital Converter (ADC) Module
For this revision of silicon, the 12-bit ADC module
INL, DNL and signal acquisition time parameters
are not within the published data sheet
specifications.
3.
10-bit ADC Module
For this revision of silicon, the 10-bit ADC module
DNL, conversion speed and signal acquisition time
parameters are not within the published data sheet
specifications.
4.
DMA Module: Interaction with
EXCH
Instruction
The
EXCH
instruction does not execute correctly
when one of the operands contains a value equal
to the address of the DMAC SFRs.
5.
DISI
Instruction
The
DISI
instruction will not disable interrupts if a
DISI
instruction is executed in the same instruc-
tion cycle that the
DISI
counter decrements to
zero.
6.
Motor Control PWM
There is a glitch in the PWMxL signal in Single-
Shot mode with complementary output. Another
glitch occurs when resuming from a Fault condition
in Free-Running mode with complementary
output.
©
2006 Microchip Technology Inc.
DS80279B-page 1
MICROCHIP [ MICROCHIP TECHNOLOGY ]
