dsPIC33F/PIC24H PROGRAMMING SPECIFICATION
3.2
Confirming the Presence of the
Programming Executive
3.3
Entering Enhanced ICSP Mode
As shown in Figure 3-3, entering Enhanced ICSP
Program/Verify mode requires three steps:
Before programming can begin, the programmer must
confirm that the programming executive is stored in
executive memory. The procedure for this task is
shown in Figure 3-2.
1. The MCLR pin is briefly driven high then low.
2. A 32-bit key sequence is clocked into PGD.
3. MCLR is then driven high within a specified
period of time and held.
First, ICSP mode is entered. Then, the unique Applica-
tion ID Word stored in executive memory is read. If the
programming executive is resident, the Application ID
Word is 0xBB, which means programming can resume
as normal. However, if the Application ID Word is not
0xBB, the programming executive must be programmed
to executive code memory using the method described in
Section 6.0 “Programming the Programming Exec-
utive to Memory”.
The programming voltage applied to MCLR is VIH,
which is essentially VDD in the case of dsPIC33F/
PIC24H devices. There is no minimum time require-
ment for holding at VIH. After VIH is removed, an inter-
val of at least P18 must elapse before presenting the
key sequence on PGD.
The key sequence is a specific 32-bit pattern,
‘0100 1101 0100 0011 0100 1000 0101 0000’
(more easily remembered as 0x4D434850 in hexa-
decimal format). The device will enter Program/Verify
mode only if the key sequence is valid. The Most
Significant bit (MSb) of the most significant nibble must
be shifted in first.
Section 5.0 “Device Programming – ICSP” describes
the ICSP programming method. Section 5.11 “Reading
the Application ID Word” describes the procedure for
reading the Application ID Word in ICSP mode.
FIGURE 3-2:
CONFIRMING PRESENCE
OF PROGRAMMING
EXECUTIVE
Once the key sequence is complete, VIH must be
applied to MCLR and held at that level for as long as
Program/Verify mode is to be maintained. An interval
time of at least P19 and P7 must elapse before present-
ing data on PGD. Signals appearing on PGD before P7
has elapsed will not be interpreted as valid.
Start
On successful entry, the program memory can be
accessed and programmed in serial fashion. While in
the Program/Verify mode, all unused I/Os are placed in
the high-impedance state.
Enter ICSP™ Mode
Read the
Application ID
from Address
0x807F0
Is
No
Application ID
0xBB?
Yes
Prog. Executive is
Resident in Memory
Prog. Executive must
be Programmed
Finish
DS70152D-page 34
Preliminary
© 2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
