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ATMEGA48V-10MUR 参数 Datasheet PDF下载

ATMEGA48V-10MUR图片预览
型号: ATMEGA48V-10MUR
PDF下载: 下载PDF文件 查看货源
内容描述: [IC MCU 8BIT 4KB FLASH 32VQFN]
分类和应用: 时钟微控制器外围集成电路闪存
文件页数/大小: 359 页 / 2546 K
品牌: MICROCHIP [ MICROCHIP ]
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ATmega48/88/168  
12.1.1  
Definitions  
Many register and bit references in this section are written in general form. A lower case “n”  
replaces the Timer/Counter number, in this case 0. A lower case “x” replaces the Output Com-  
pare Unit, in this case Compare Unit A or Compare Unit B. However, when using the register or  
bit defines in a program, the precise form must be used, i.e., TCNT0 for accessing  
Timer/Counter0 counter value and so on.  
The definitions in Table 12-1 are also used extensively throughout the document.  
Table 12-1. Definitions  
BOTTOM  
MAX  
The counter reaches the BOTTOM when it becomes 0x00.  
The counter reaches its MAXimum when it becomes 0xFF (decimal 255).  
TOP  
The counter reaches the TOP when it becomes equal to the highest value in the  
count sequence. The TOP value can be assigned to be the fixed value 0xFF  
(MAX) or the value stored in the OCR0A Register. The assignment is depen-  
dent on the mode of operation.  
12.1.2  
Registers  
The Timer/Counter (TCNT0) and Output Compare Registers (OCR0A and OCR0B) are 8-bit  
registers. Interrupt request (abbreviated to Int.Req. in the figure) signals are all visible in the  
Timer Interrupt Flag Register (TIFR0). All interrupts are individually masked with the Timer Inter-  
rupt Mask Register (TIMSK0). TIFR0 and TIMSK0 are not shown in the figure.  
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on  
the T0 pin. The Clock Select logic block controls which clock source and edge the Timer/Counter  
uses to increment (or decrement) its value. The Timer/Counter is inactive when no clock source  
is selected. The output from the Clock Select logic is referred to as the timer clock (clkT0).  
The double buffered Output Compare Registers (OCR0A and OCR0B) are compared with the  
Timer/Counter value at all times. The result of the compare can be used by the Waveform Gen-  
erator to generate a PWM or variable frequency output on the Output Compare pins (OC0A and  
OC0B). See Section “13.6.3” on page 116. for details. The compare match event will also set the  
Compare Flag (OCF0A or OCF0B) which can be used to generate an Output Compare interrupt  
request.  
12.2 Timer/Counter Clock Sources  
The Timer/Counter can be clocked by an internal or an external clock source. The clock source  
is selected by the Clock Select logic which is controlled by the Clock Select (CS02:0) bits  
located in the Timer/Counter Control Register (TCCR0B). For details on clock sources and pres-  
caler, see ”Timer/Counter0 and Timer/Counter1 Prescalers” on page 135.  
12.3 Counter Unit  
The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit. Figure  
12-2 shows a block diagram of the counter and its surroundings.  
89  
2545E–AVR–02/05  
 
 
 
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