9. Interrupts
This section describes the specifics of the interrupt handling as performed in ATmega48/88/168.
For a general explanation of the AVR interrupt handling, refer to ”Reset and Interrupt Handling”
on page 12.
The interrupt vectors in ATmega48, ATmega88 and ATmega168 are generally the same, with
the following differences:
• Each Interrupt Vector occupies two instruction words in ATmega168, and one instruction word
in ATmega48 and ATmega88.
• ATmega48 does not have a separate Boot Loader Section. In ATmega88 and ATmega168, the
Reset Vector is affected by the BOOTRST fuse, and the Interrupt Vector start address is
affected by the IVSEL bit in MCUCR.
9.1
Interrupt Vectors in ATmega48
Table 9-1.
Reset and Interrupt Vectors in ATmega48
Vector No. Program Address Source
Interrupt Definition
External Pin, Power-on Reset, Brown-out Reset and Watchdog System Reset
External Interrupt Request 0
External Interrupt Request 1
Pin Change Interrupt Request 0
Pin Change Interrupt Request 1
Pin Change Interrupt Request 2
Watchdog Time-out Interrupt
Timer/Counter2 Compare Match A
Timer/Counter2 Compare Match B
Timer/Counter2 Overflow
1
2
0x000
0x001
0x002
0x003
0x004
0x005
0x006
0x007
0x008
0x009
0x00A
0x00B
0x00C
0x00D
0x00E
0x00F
0x010
0x011
0x012
0x013
0x014
0x015
0x016
RESET
INT0
3
INT1
4
PCINT0
5
PCINT1
6
PCINT2
7
WDT
8
TIMER2 COMPA
TIMER2 COMPB
TIMER2 OVF
TIMER1 CAPT
TIMER1 COMPA
TIMER1 COMPB
TIMER1 OVF
TIMER0 COMPA
TIMER0 COMPB
TIMER0 OVF
SPI, STC
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
Timer/Counter1 Capture Event
Timer/Counter1 Compare Match A
Timer/Coutner1 Compare Match B
Timer/Counter1 Overflow
Timer/Counter0 Compare Match A
Timer/Counter0 Compare Match B
Timer/Counter0 Overflow
SPI Serial Transfer Complete
USART Rx Complete
USART, RX
USART, UDRE
USART, TX
ADC
USART, Data Register Empty
USART, Tx Complete
ADC Conversion Complete
EE READY
EEPROM Ready
54
ATmega48/88/168
2545E–AVR–02/05