15.2 SS Pin Functionality
15.2.1 Slave Mode
When the SPI is configured as a slave, the slave select (SS) pin is always input. When SS is held low, the SPI is activated,
and MISO becomes an output if configured so by the user. All other pins are inputs. When SS is driven high, all pins are
inputs, and the SPI is passive, which means that it will not receive incoming data. Note that the SPI logic will be reset once
the SS pin is driven high.
The SS pin is useful for packet/byte synchronization to keep the slave bit counter synchronous with the master clock
generator. When the SS pin is driven high, the SPI slave will immediately reset the send and receive logic, and drop any
partially received data in the shift register.
15.2.2 Master Mode
When the SPI is configured as a master (MSTR in SPCR is set), the user can determine the direction of the SS pin.
If SS is configured as an output, the pin is a general output pin which does not affect the SPI system. Typically, the pin will be
driving the SS pin of the SPI slave.
If SS is configured as an input, it must be held high to ensure master SPI operation. If the SS pin is driven low by peripheral
circuitry when the SPI is configured as a master with the SS pin defined as an input, the SPI system interprets this as
another master selecting the SPI as a slave and starting to send data to it. To avoid bus contention, the SPI system takes the
following actions:
1. The MSTR bit in SPCR is cleared and the SPI system becomes a slave. As a result of the SPI becoming a slave,
the MOSI and SCK pins become inputs.
2. The SPIF flag in SPSR is set, and if the SPI interrupt is enabled, and the I-bit in SREG is set, the interrupt routine
will be executed.
Thus, when interrupt-driven SPI transmission is used in master mode, and there exists a possibility that SS is driven low, the
interrupt should always check that the MSTR bit is still set. If the MSTR bit has been cleared by a slave select, it must be set
by the user to re-enable SPI master mode.
15.2.3 MCU Control Register – MCUCR
Bit
7
SPIPS
R/W
0
6
–
5
–
4
3
–
2
–
1
IVSEL
R/W
0
0
IVCE
R/W
0
PUD
R/W
0
MCUCR
Read/Write
Initial Value
R
0
R
0
R
0
R
0
• Bit 7– SPIPS: SPI Pin Redirection
●
●
●
Thanks to SPIPS (SPI pin select) in MCUCR Sfr, SPI pins can be redirected.
When the SPIPS bit is written to zero, the SPI signals are directed on pins MISO,MOSI, SCK and SS.
When the SPIPS bit is written to one, the SPI signals are directed on alternate SPI pins, MISO_A, MOSI_A, SCK_A
and SS_A.
Note that programming port are always located on alternate SPI port.
ATmega16/32/64/M1/C1 [DATASHEET]
137
7647O–AVR–01/15
MICROCHIP [ MICROCHIP ]
