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AT25256B-SSHL-T-537 参数 Datasheet PDF下载

AT25256B-SSHL-T-537图片预览
型号: AT25256B-SSHL-T-537
PDF下载: 下载PDF文件 查看货源
内容描述: [EEPROM, 32KX8, Serial, CMOS, PDSO8]
分类和应用: 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟光电二极管内存集成电路
文件页数/大小: 42 页 / 1320 K
品牌: MICROCHIP [ MICROCHIP ]
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AT25128B/AT25256B  
Pin Description  
2.5  
2.6  
Serial Data Input (SI)  
The Serial Data Input (SI) pin is used to transfer data into the device. It receives instructions, addresses  
and data. Data is latched on the rising edge of the Serial Data Clock (SCK).  
Serial Data Clock (SCK)  
The Serial Data Clock (SCK) pin is used to synchronize the communication between a master and the  
AT25128B/AT25256B. Instructions, addresses or data present on the Serial Data Input (SI) pin is latched  
in on the rising edge of SCK, while output on the Serial Data Output (SO) pin is clocked out on the falling  
edge of SCK.  
2.7  
Suspend Serial Input (HOLD)  
The Suspend Serial Input (HOLD) pin is used in conjunction with the Chip Select (CS) pin to pause the  
AT25128B/AT25256B. When the device is selected and a serial sequence is underway, HOLD can be  
used to pause the serial communication with the master device without resetting the serial sequence. To  
pause, the HOLD pin must be brought low while the Serial Data Clock (SCK) pin is low. To resume serial  
communication, the HOLD pin is brought high while the SCK pin is low (SCK may still toggle during  
HOLD). Inputs to the Serial Data Input (SI) pin will be ignored while the Serial Data Output (SO) pin will  
be in the highimpedance state.  
2.8  
Device Power Supply (VCC)  
The Device Power Supply (VCC) pin is used to supply the source voltage to the device. Operations at  
invalid VCC voltages may produce spurious results and should not be attempted.  
DS20006193A-page 6  
© 2019 Microchip Technology Inc.  
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