欢迎访问ic37.com |
会员登录 免费注册
发布采购

AT24C256C-SSHL-T-537 参数 Datasheet PDF下载

AT24C256C-SSHL-T-537图片预览
型号: AT24C256C-SSHL-T-537
PDF下载: 下载PDF文件 查看货源
内容描述: [EEPROM, 32KX8, Serial, CMOS, PDSO8]
分类和应用: 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟光电二极管内存集成电路
文件页数/大小: 39 页 / 975 K
品牌: MICROCHIP [ MICROCHIP ]
 浏览型号AT24C256C-SSHL-T-537的Datasheet PDF文件第7页浏览型号AT24C256C-SSHL-T-537的Datasheet PDF文件第8页浏览型号AT24C256C-SSHL-T-537的Datasheet PDF文件第9页浏览型号AT24C256C-SSHL-T-537的Datasheet PDF文件第10页浏览型号AT24C256C-SSHL-T-537的Datasheet PDF文件第12页浏览型号AT24C256C-SSHL-T-537的Datasheet PDF文件第13页浏览型号AT24C256C-SSHL-T-537的Datasheet PDF文件第14页浏览型号AT24C256C-SSHL-T-537的Datasheet PDF文件第15页  
AT24C256C  
Electrical Characteristics  
2. This parameter is ensured by characterization and is not 100% tested.  
Figure 4-1.ꢀBus Timing  
tHIGH  
tF  
tR  
tLOW  
SCL  
tSU.STA  
tHD.STA  
tHD.DAT  
tSU.DAT  
tSU.STO  
SDA In  
tBUF  
tAA  
tDH  
SDA Out  
4.5  
Electrical Specifications  
4.5.1  
Power-up Requirements and Reset Behavior  
During a power-up sequence, the VCC supplied to the AT24C256C should monotonically rise from GND to  
the minimum VCC level, as specified in Table 4-1, with a slew rate no faster than 0.1 V/μs.  
4.5.1.1 Device Reset  
To prevent inadvertent write operations or any other spurious events from occurring during a powerup  
sequence, the AT24C256C includes a Power-on Reset (POR) circuit. Upon powerup, the device will not  
respond to any commands until the VCC level crosses the internal voltage threshold (VPOR) that brings the  
device out of Reset and into Standby mode.  
The system designer must ensure the instructions are not sent to the device until the VCC supply has  
reached a stable value greater than or equal to the minimum VCC level. Additionally, once the VCC is  
greater than or equal to the minimum VCC level, the bus master must wait at least tPUP before sending the  
first command to the device. See Table 4-4 for the values associated with these powerup parameters.  
Table 4-4.ꢀPower-up Conditions(1)  
Symbol  
Parameter  
Min. Max. Units  
tPUP  
Time required after VCC is stable before the device can accept commands 100  
1.5  
µs  
V
VPOR Power-on Reset Threshold Voltage  
tPOFF Minimum time at VCC = 0V between power cycles  
500  
ms  
Note:ꢀ  
1. These parameters are characterized but they are not 100% tested in production.  
If an event occurs in the system where the VCC level supplied to the AT24C256C drops below the  
maximum VPOR level specified, it is recommended that a full power cycle sequence be performed by first  
driving the VCC pin to GND, waiting at least the minimum tPOFF time and then performing a new power-up  
sequence in compliance with the requirements defined in this section.  
DS20006042A-page 11  
Datasheet  
© 2018 Microchip Technology Inc.