AT24C256C-SSHL-T-989 参数 Datasheet PDF下载

AT24C256C

Description

3.

Description

The AT24C256C provides 262,144 bits of Serial Electrically Erasable and Programmable Read-Only

Memory (EEPROM) organized as 32,768 words of 8 bits each. The device’s cascading feature allows up

to eight devices to share a common 2‑wire bus. The device is optimized for use in many industrial and

commercial applications where low‑power and low‑voltage operation are essential. The devices are

available in space‑saving 8‑lead SOIC, 8‑lead TSSOP, 8‑pad UDFN and 8‑ball VFBGA packages. All

packages operate from 1.7V to 5.5V.

3.1

System Configuration Using 2-Wire Serial EEPROMs

V

CC

R

PUP(max) =

V

CC

SCL

SDA

WP

t

R(max)

0.8473 x C

L

V - V

OL(max)

R

PUP(min) = CC

I

OL

I

2

C Bus Master:

Microcontroller

A0

A1

V

CC

A0

A1

V

CC

A0

A1

V

CC

A2

AT24CXXX

SDA

Slave 0

WP

A2

AT24CXXX

SDA

GND

SCL

Slave 1

WP

A2

AT24CXXX

SDA

GND

SCL

Slave 7

WP

GND

GND

SCL

©

2018 Microchip Technology Inc.

Datasheet

DS20006042A-page 7