Using the 93LC56 and 93LC66
0061
0062
0063
0064
0065
0066
0067
0068
0069
0070
0071
0072
0073
0074
0075
0076
0077
0078
0079
0080
0081
0082
0083
0084
0085
0086
0087
0088
0089
0090
0091
0092
0093
0094
0095
0096
0097
0098
0099
0100
0101
0102
0006
0007
0006
0005
0004
do
equ
6
; eeprom output
datout equ
7
; data out line (port_b)
datin
equ
6
; data in line (port_b)
sclk
equ
5
; clock line (port_b)
chpsel equ
4
; chip select line (port_b)
;
;*************************************************************
org
01ffh
begin
goto
PWRUP
; set the reset vector
org
000h
goto
PWRUP
;
;*************************************************************
;
DELAY ROUTINE
;
This routine takes the value in ‘loops’
;
and multiplies it times 1 millisecond to
;
determine delay time.
;*************************************************************
WAIT
;
top
movlw
.110
; timing adjustment variable
movwf
loops2
top2
nop
; sit and wait
nop
nop
nop
nop
nop
decfsz loops2
; inner loops complete?
goto
top2
; no, go again
;
decfsz loops
; outer loops complete?
goto
top
; no, go again
retlw
0
; yes, return from sub
;
;**************************************************************
;
Start Bit Subroutine
;
this routine generates a start bit
;
(Chip select and DI high when clock goes high)
;**************************************************************;
BSTART
movlw
b’10001111'
Mon Jun 06 10:49:06 1994
Page 3
01FF
0000
0000
0A2F
0000
0A2F
0001
0002
0003
0004
0005
0006
0007
0008
0009
000A
000B
000C
000D
0C6E
0036
0000
0000
0000
0000
0000
0000
02F6
0A03
02F5
0A01
0800
000E
0C8F
16c5x/7x Cross-Assembler V4.12 Released
Line
0103
0104
0105
0106
0107
0108
0109
0110
0111
0112
0113
0114
0115
0116
0117
0118
0119
0120
0121
0122
0123
0124
PC
000F
0010
0011
0012
0013
0014
0015
0016
0017
0018
0019
001A
001B
Opcode
0006
04C6
0486
04A6
0000
;
0586
05C6
0000
05A6
0000
0000
04A6
0800
bsf
bsf
nop
bsf
tris
bcf
bcf
bcf
nop
port_b
port_b,datin
port_b,chpsel
port_b,sclk
;
;
;
;
;
set port b for output
except for the data out line
set datain and chipselect lines
low just to check operation
make sure clock starts low too.
8
port_b,chpsel
port_b,datin
port_b,sclk
; set chip select line high
; set data in line high
; set the clock line high to
; generate the start bit
nop
nop
bcf
port_b,sclk
; set clock low again
retlw
0
;
;*************************************************************
;
BITOUT routine
;
This routine takes one bit of data in ‘do’ and
;
transmits it to the serial EE device
;*************************************************************
© 1994 Microchip Technology Inc.
DS00560D-page 7
8-105
MICROCHIP [ MICROCHIP TECHNOLOGY ]
