25AA040/25LC040/25C040
FIGURE 3-1:
CS
0
SCK
Instruction
SI
0
0
0
0
A8
0
1
1
A7
6
Lower Address Byte
5
4
3
2
1
A0
Don’t Care
Data Out
7
6
5
4
3
2
1
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
READ SEQUENCE
High-impedance
SO
FIGURE 3-2:
BYTE WRITE SEQUENCE
CS
T
WC
0
SCK
Instruction
SI
0
0
0
0
A8
0
1
0
A7
6
Lower Address Byte
5
4
3
2
1
A0
7
6
5
Data Byte
4
3
2
1
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
High-impedance
SO
FIGURE 3-3:
CS
0
SCK
1
2
PAGE WRITE SEQUENCE
3
4
5
6
7
8
9 10 11 13 14 15 16 17 18 19 20 21 22 23 24
Instruction
SI
0
0
0
0
A8
0
1
0
A7 6
Lower Address Byte
5
4
3
2
1
0
7
6
5
Data Byte 1
4
3
2
1
0
CS
25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
SCK
Data Byte 2
SI
7
6
5
4
3
2
1
0
7
6
Data Byte 3
5
4
3
2
1
0
7
Data Byte n (16 max)
6
5
4
3
2
1
0
DS21204E-page 8
©
2006 Microchip Technology Inc.
MICROCHIP [ MICROCHIP TECHNOLOGY ]
