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24LC64-I/P 参数 Datasheet PDF下载

24LC64-I/P图片预览
型号: 24LC64-I/P
PDF下载: 下载PDF文件 查看货源
内容描述: 64K I2C ™串行EEPROM [64K I2C™ Serial EEPROM]
分类和应用: 存储内存集成电路光电二极管双倍数据速率可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 36 页 / 723 K
品牌: MICROCHIP [ MICROCHIP TECHNOLOGY ]
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24AA64/24LC64/24FC64
7.0
ACKNOWLEDGE POLLING
FIGURE 7-1:
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the Stop condition for a Write
command has been issued from the master, the device
initiates the internally-timed write cycle and ACK polling
can then be initiated immediately. This involves the
master sending a Start condition followed by the control
byte for a Write command (R/W =
0).
If the device is still
busy with the write cycle, then no ACK will be returned.
If no ACK is returned, the Start bit and control byte must
be re-sent. If the cycle is complete, the device will
return the ACK and the master can then proceed with
the next Read or Write command. See Figure 7-1 for a
flow diagram of this operation.
ACKNOWLEDGE POLLING
FLOW
Send
Write Command
Send Stop
Condition to
Initiate Write Cycle
Send Start
Send Control Byte
with R/W =
0
Did Device
Acknowledge
(ACK =
0)?
Yes
Next
Operation
No
DS21189Q-page 10
©
2009 Microchip Technology Inc.