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24LC00-I/SN 参数 Datasheet PDF下载

24LC00-I/SN图片预览
型号: 24LC00-I/SN
PDF下载: 下载PDF文件 查看货源
内容描述: 128位I2C总线串行EEPROM [128 Bit I2C Bus Serial EEPROM]
分类和应用: 存储内存集成电路光电二极管PC可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 24 页 / 364 K
品牌: MICROCHIP [ MICROCHIP ]
 浏览型号24LC00-I/SN的Datasheet PDF文件第3页浏览型号24LC00-I/SN的Datasheet PDF文件第4页浏览型号24LC00-I/SN的Datasheet PDF文件第5页浏览型号24LC00-I/SN的Datasheet PDF文件第6页浏览型号24LC00-I/SN的Datasheet PDF文件第8页浏览型号24LC00-I/SN的Datasheet PDF文件第9页浏览型号24LC00-I/SN的Datasheet PDF文件第10页浏览型号24LC00-I/SN的Datasheet PDF文件第11页  
24AA00/24LC00/24C00  
FIGURE 7-1:  
ACKNOWLEDGE  
POLLING FLOW  
7.0  
ACKNOWLEDGE POLLING  
Since the device will not acknowledge during a write  
cycle, this can be used to determine when the cycle is  
complete (this feature can be used to maximize bus  
throughput). Once the Stop condition for a Write  
command has been issued from the master, the device  
initiates the internally timed write cycle. ACK polling  
can be initiated immediately. This involves the master  
sending a Start condition followed by the control byte  
for a Write command (R/W = 0). If the device is still  
busy with the write cycle, then no ACK will be returned.  
If no ACK is returned, then the Start bit and control byte  
must be re-sent. If the cycle is complete, then the  
device will return the ACK and the master can then  
proceed with the next Read or Write command. See  
Figure 7-1 for flow diagram.  
Send  
Write Command  
Send Stop  
Condition to  
Initiate Write Cycle  
Send Start  
Send Control Byte  
with R/W = 0  
Did Device  
Acknowledge  
(ACK = 0)?  
No  
Yes  
Next  
Operation  
FIGURE 7-2:  
BYTE WRITE  
S
T
A
R
T
S
T
O
P
BUS ACTIVITY  
MASTER  
Control  
Byte  
Word  
Address  
Data  
SDA LINE  
P
S
1
0
1
0
x
x
x
0
x
x
x
x
A
C
K
A
C
K
A
C
K
BUS ACTIVITY  
x = “don’t care” bit  
© 2007 Microchip Technology Inc.  
DS21178G-page 7  
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