PIC16F818/819
bit BOR cleared, indicating
occurred. When the Brown-out Reset is disabled, the
state of the BOR bit is unpredictable.
a Brown-out Reset
12.9 Power Control/Status Register
(PCON)
The Power Control/Status register, PCON, has two bits
to indicate the type of Reset that last occurred.
Bit 1 is Power-on Reset Status bit, POR. It is cleared on
a Power-on Reset and unaffected otherwise. The user
must set this bit following a Power-on Reset.
Bit 0 is Brown-out Reset Status bit, BOR. Bit BOR is
unknown on a Power-on Reset. It must then be set by
the user and checked on subsequent Resets to see if
TABLE 12-1: TIME-OUT IN VARIOUS SITUATIONS
Power-up
Oscillator
Brown-out Reset
Wake-up
Configuration
from Sleep
PWRTE = 0
PWRTE = 1
PWRTE = 0
PWRTE = 1
XT, HS, LP
TPWRT + 1024 • TOSC 1024 • TOSC TPWRT + 1024 • TOSC 1024 • TOSC 1024 • TOSC
TPWRT TPWRT
5-10 µs(1) 5-10 µs(1) 5-10 µs(1)
EXTRC, EXTCLK, INTRC
Note 1: CPU start-up is always invoked on POR, BOR and wake-up from Sleep.
TABLE 12-2: STATUS BITS AND THEIR SIGNIFICANCE
POR
BOR
TO
PD
0
0
0
1
1
1
1
1
x
x
x
0
1
1
1
1
1
0
x
1
0
0
u
1
1
x
0
1
1
0
u
0
Power-on Reset
Illegal, TO is set on POR
Illegal, PD is set on POR
Brown-out Reset
WDT Reset
WDT wake-up
MCLR Reset during normal operation
MCLR Reset during Sleep or interrupt wake-up from Sleep
Legend: u= unchanged, x= unknown
TABLE 12-3: RESET CONDITION FOR SPECIAL REGISTERS
Program
Status
Register
PCON
Register
Condition
Counter
Power-on Reset
000h
000h
0001 1xxx
000u uuuu
0001 0uuu
0000 1uuu
uuu0 0uuu
0001 1uuu
uuu1 0uuu
---- --0x
---- --uu
---- --uu
---- --uu
---- --uu
---- --u0
---- --uu
MCLR Reset during normal operation
MCLR Reset during Sleep
WDT Reset
000h
000h
WDT wake-up
PC + 1
000h
PC + 1(1)
Brown-out Reset
Interrupt wake-up from Sleep
Legend: u= unchanged, x= unknown, -= unimplemented bit, read as ‘0’
Note 1: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector
(0004h).
2004 Microchip Technology Inc.
DS39598E-page 93
MICROCHIP [ MICROCHIP ]
