PIC16F818/819
REGISTER 11-2: ADCON1: A/D CONTROL REGISTER 1 (ADDRESS 9Fh)
R/W-0
ADFM
R/W-0
U-0
—
U-0
—
R/W-0
R/W-0
R/W-0
R/W-0
ADCS2
PCFG3
PCFG2
PCFG1 PCFG0
bit 0
bit 7
bit 7
bit 6
ADFM: A/D Result Format Select bit
1= Right justified, 6 Most Significant bits of ADRESH are read as ‘0’
0= Left justified, 6 Least Significant bits of ADRESL are read as ‘0’
ADCS2: A/D Clock Divide by 2 Select bit
1= A/D clock source is divided by 2 when system clock is used
0= Disabled
bit 5-4
bit 3-0
Unimplemented: Read as ‘0’
PCFG<3:0>: A/D Port Configuration Control bits
PCFG
AN4
AN3
AN2
AN1
AN0
VREF+
VREF-
C/R
0000
0001
0010
0011
0100
0101
011x
1000
1001
1010
1011
1100
1101
1110
1111
A
A
A
A
D
D
D
A
A
A
A
A
D
D
D
A
A
A
A
A
A
A
A
A
D
A
A
A
A
A
A
D
D
A
A
A
A
A
A
D
A
A
A
A
A
A
A
A
AVDD
AN3
AVDD
AN3
AVDD
AN3
AVDD
AN3
AVDD
AN3
AN3
AN3
AN3
AVDD
AN3
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AN2
5/0
4/1
5/0
4/1
3/0
2/1
0/0
3/2
5/0
4/1
3/2
3/2
2/2
1/0
1/2
VREF+
A
A
VREF+
A
A
D
VREF+
D
D
D
VREF+
A
VREF-
A
AVSS
AVSS
AN2
VREF+
VREF+
VREF+
VREF+
D
A
VREF-
VREF-
VREF-
D
AN2
AN2
AVSS
AN2
VREF+
VREF-
A = Analog input
D = Digital I/O
C/R = Number of analog input channels/Number of A/D voltage references
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
DS39598D-page 82
2003 Microchip Technology Inc.