PIC16F818/819
EXAMPLE 6-1:
CHANGING THE PRESCALER ASSIGNMENT FROM TIMER0 TO WDT
BANKSEL OPTION_REG
; Select Bank of OPTION_REG
; Select clock source and prescale value of
; other than 1:1
MOVLW
MOVWF
b'xx0x0xxx'
OPTION_REG
BANKSEL TMR0
CLRF TMR0
BANKSEL OPTION_REG
; Select Bank of TMR0
; Clear TMR0 and prescaler
; Select Bank of OPTION_REG
; Select WDT, do not change prescale value
MOVLW
MOVWF
CLRWDT
MOVLW
MOVWF
b'xxxx1xxx'
OPTION_REG
; Clears WDT and prescaler
; Select new prescale value and WDT
b'xxxx1xxx'
OPTION_REG
EXAMPLE 6-2:
CHANGING THE PRESCALER ASSIGNMENT FROM WDT TO TIMER0
CLRWDT
BANKSEL OPTION_REG
; Clear WDT and prescaler
; Select Bank of OPTION_REG
MOVLW
MOVWF
b'xxxx0xxx'
OPTION_REG
; Select TMR0, new prescale
; value and clock source
TABLE 6-1:
REGISTERS ASSOCIATED WITH TIMER0
Value on
all other
Resets
Value on
POR, BOR
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1 Bit 0
01h,101h TMR0
Timer0 Module Register
xxxx xxxx uuuu uuuu
RBIE TMR0IF INTF RBIF 0000 000x 0000 000u
0Bh,8Bh,
INTCON
GIE
PEIE
TMR0IE
INTE
T0SE
10Bh,18Bh
81h,181h OPTION_REG
RBPU INTEDG
T0CS
PSA
PS2
PS1
PS0 1111 1111 1111 1111
Legend:
x= unknown, u= unchanged, -= unimplemented locations read as ‘0’. Shaded cells are not used by Timer0.
2004 Microchip Technology Inc.
DS39598E-page 55